Datenblatt-Suchmaschine für elektronische Bauteile |
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TS1GDOM44V-S Datenblatt(PDF) 8 Page - Transcend Information. Inc. |
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TS1GDOM44V-S Datenblatt(HTML) 8 Page - Transcend Information. Inc. |
8 / 34 page T T Tr rra a an n ns s sc c ce e en n nd d d 4 4 44 4 4---P P Piiin n n IIID D DE E E F F Fllla a as s sh h h M M Mo o od d du u ullle e e T T TS S S1 1 12 2 28 8 8M M M ~ ~ ~ 8 8 8G G GD D DO O OM M M4 4 44 4 4V V V---S S S Transcend Information Inc. Ver 1.2 8 True IDE Multiword DMA Mode Read/Write Timing Specification Item Mode 0 (ns) Mode 1 (ns) Mode 2 (ns) Mode 3 (ns) Mode 4 (ns) t0 Cycle time (min) 1 480 150 120 100 80 tD -IORD / -IOWR asserted width(min) 1 215 80 70 65 55 tE -IORD data access (max) 150 60 50 50 45 tF -IORD data hold (min) 5 5 5 5 5 tG -IORD/-IOWR data setup (min) 100 30 20 15 10 tH -IOWR data hold (min) 20 15 10 5 5 tI DMACK to –IORD/-IOWR setup (min) 0 0 0 0 0 tJ -IORD / -IOWR to -DMACK hold (min) 20 5 5 5 5 tKR -IORD negated width (min) 1 50 50 25 25 20 tKW -IOWR negated width (min) 1 215 50 25 25 20 tLR -IORD to DMARQ delay (max) 120 40 35 35 35 tLW -IOWR to DMARQ delay (max) 40 40 35 35 35 tM CS(1:0) valid to –IORD / -IOWR 50 30 25 10 5 tN CS(1:0) hold 15 10 10 10 10 tZ -DMACK 20 25 25 25 25 Notes: (1) t0 is the minimum total cycle time and tD is the minimum command active time, while tKR and tKW are the minimum command recovery time or command inactive time for input and output cycles respectively. The actual cycle time equals the sum of the actual command active time and the actual command inactive time. The three timing requirements of t0, tD, tKR, and tKW shall be met. The minimum total cycle time requirement is greater than the sum of tD and tKR or tKW.for input and output cycles respectively. This means a host implementation can lengthen either or both of tD and either of tKR, and tKW as needed to ensure that t0 is equal to or greater than the value reported in the device’s identify device data. |
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