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74AHCT2G32 Datenblatt(PDF) 6 Page - NXP Semiconductors |
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74AHCT2G32 Datenblatt(HTML) 6 Page - NXP Semiconductors |
6 / 13 page 74AHC_AHCT2G32_2 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 02 — 20 January 2009 6 of 13 NXP Semiconductors 74AHC2G32; 74AHCT2G32 Dual 2-input OR gate [1] tpd is the same as tPLH and tPHL. [2] Typical values are measured at VCC = 3.3 V. [3] Typical values are measured at VCC = 5.0 V. [4] CPD is used to determine the dynamic power dissipation (PD in µW). PD =CPD × VCC2 × fi × N+ Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ(C L × VCC 2 × f o) = sum of the outputs. 12. Waveforms 74AHCT2G32 tpd propagation delay nA, nB to nY; see Figure 6 [1] VCC = 4.5 V to 5.5 V [3] CL = 15 pF - 3.3 6.9 1.0 8.0 1.0 9.0 ns CL = 50 pF - 4.8 7.9 1.0 9.0 1.0 10.0 ns CPD power dissipation capacitance per buffer; CL = 50 pF; fi = 1 MHz; VI = GND to VCC [4] -17- - - - - pF Table 8. Dynamic characteristics …continued GND = 0 V; for test circuit see Figure 7. Symbol Parameter Conditions 25 °C −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ Max Min Max Min Max Fig 6. The input (nA and nB) to output (nY) propagation delays. mna224 nA, nB input nY output tPLH tPHL GND VI VM VM VOH VOL Table 9. Measurement points Type Input Output VM VM 74AHC2G32 0.5VCC 0.5VCC 74AHCT2G32 1.5 V 0.5VCC |
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