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ADC0801S040 Datenblatt(PDF) 4 Page - NXP Semiconductors |
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ADC0801S040 Datenblatt(HTML) 4 Page - NXP Semiconductors |
4 / 19 page ADC0801S040_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 18 August 2008 4 of 19 NXP Semiconductors ADC0801S040 Single 8 bits ADC, up to 40 MHz 7. Pinning information 7.1 Pinning 7.2 Pin description Fig 2. Pin configuration ADC0801S 040TS CLK VDDO SLEEP D7 VDDD D6 VSSD D5 VDDA D4 VSSA D3 RB D2 RM D1 VI D0 RT VSSO 014aaa494 1 2 3 4 5 6 7 8 9 10 12 11 14 13 16 15 18 17 20 19 Table 3. Pin description Symbol Pin Description CLK 1 clock input SLEEP 2 sleep mode input VDDD 3 digital supply voltage (2.7 V to 5.5 V) VSSD 4 digital ground VDDA 5 analog supply voltage (2.7 V to 5.5 V) VSSA 6 analog ground RB 7 reference voltage BOTTOM input RM 8 reference voltage MIDDLE VI 9 analog input voltage RT 10 reference voltage TOP input VSSO 11 output stage ground D0 12 data output; bit 0 (Least Significant Bit (LSB)) D1 13 data output; bit 1 D2 14 data output; bit 2 D3 15 data output; bit 3 D4 16 data output; bit 4 D5 17 data output; bit 5 |
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