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SM32DM355GCEM216EP Datenblatt(PDF) 1 Page - Texas Instruments

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Teilenummer SM32DM355GCEM216EP
Bauteilbeschribung  Digital Media System-on-Chip(DMSoC)
Download  156 Pages
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Hersteller  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

SM32DM355GCEM216EP Datenblatt(HTML) 1 Page - Texas Instruments

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SM320DM355-EP Digital Media System-on-Chip (DMSoC)
1.1 Features
SM320DM355-EP
Digital Media System-on-Chip (DMSoC)
www.ti.com
SPRS575 – JULY 2009
Digital Output
• High-Performance Digital Media
• BT.601/BT.656 Digital YCbCr 4:2:2
System-on-Chip
(8-/16-Bit) Interface
135-, 216-, and 270-MHz ARM926EJ-S Clock
• Supports digital HDTV (720p/1080i)
Rate; and Up to 216 MHz in M-Temp
output for connection to external
(M216EP)
encoder
Fully Software-Compatible With ARM9™
• External Memory Interfaces (EMIFs)
• ARM926EJ-S Core
DDR2 and mDDR SDRAM 16-bit wide EMIF
Support for 32-Bit and 16-Bit (Thumb Mode)
With 256 MByte Address Space (1.8-V I/O)
Instruction Sets
Asynchronous16-/8-bit Wide EMIF (AEMIF)
DSP Instruction Extensions and Single
• Flash Memory Interfaces
Cycle MAC
NAND (8-/16-bit Wide Data)
ARM® Jazelle® Technology
OneNAND(16-bit Wide Data)
EmbeddedICE-RT™ Logic for Real-Time
Debug
• Flash Card Interfaces
• ARM9 Memory Architecture
Two Multimedia Card (MMC) / Secure
Digital (SD/SDIO)
16K-Byte Instruction Cache
SmartMedia
8K-Byte Data Cache
32K-Byte RAM
• Enhanced Direct-Memory-Access (EDMA)
Controller (64 Independent Channels)
8K-Byte ROM
• USB Port with Integrated 2.0 High-Speed PHY
Little Endian
that Supports
• MPEG4/JPEG Coprocessor
USB 2.0 Full and High-Speed Device
Fixed Function Coprocessor Supports:
USB 2.0 Low, Full, and High-Speed Host
• MPEG4 SP Codec at HD (720p), D1,
• Three 64-Bit General-Purpose Timers (each
VGA, SIF
configurable as two 32-bit timers)
• JPEG Codec up to 50M Pixels per
• One 64-Bit Watch Dog Timer
Second
• Three UARTs (One fast UART with RTS and
• Video Processing Subsystem
CTS Flow Control)
Front End Provides:
• Three Serial Port Interfaces (SPI) each with
• Hardware IPIPE for Real-Time Image
two Chip-Selects
Processing
• One Master/Slave Inter-Integrated Circuit (I2C)
• Up to 14-bit CCD/CMOS Digital Interface
Bus®
• 16-/8-bit Generic YcBcR-4:2 Interface
• Two Audio Serial Port (ASP)
(BT.601)
I2S and TDM I2S
• 10-/8-bit CCIR6565/BT655 Interface
AC97 Audio Codec Interface
• Up to 75-MHz Pixel Clock
S/PDIF via Software
• Histogram Module
Standard Voice Codec Interface (AIC12)
• Resize Engine
SPI Protocol (Master Mode Only)
Resize Images From 1/16x to 8x
Separate Horizontal/Vertical Control
• Four Pulse Width Modulator (PWM) Outputs
Two Simultaneous Output Paths
• Four RTO (Real Time Out) Outputs
Back End Provides:
• Up to 104 General-Purpose I/O (GPIO) Pins
(Multiplexed with Other Device Functions)
• Hardware On-Screen Display (OSD)
• Composite NTSC/PAL video encoder
• On-Chip ARM ROM Bootloader (RBL) to Boot
output
From NAND Flash, MMC/SD, USB, or UART
• 8-/16-bit YCC and Up to 18-Bit RGB666
• Configurable Power-Saving Modes
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this document.
Windows is a trademark of Microsoft.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright © 2009, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.


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