ADM1031ARQZ-REEL datasheet(7/30 Pages) ONSEMI

Teilenummer	ADM1031ARQZ-REEL

Bauteilbeschribung	Intelligent Temperature Monitor and Dual PWM Fan Controller

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ADM1031

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Functional Description

The ADM1031 is a temperature monitor and dual PWM

fan controller for microprocessor−based systems. The

device communicates with the system via a serial System

Management Bus (SMBus). The serial bus controller has a

hardwired address pin for device selection (Pin 13), a serial

data line for reading and writing addresses and data (Pin 15),

and an input line for the serial clock (Pin 16). All control and

programming functions of the ADM1031 are performed

over the serial bus. The device also supports Alert Response

Address (ARA).

Internal Registers

Brief descriptions of the ADM1031’s principal internal

registers are given below. For more detailed information on

the function of each register, see Table 14 through Table 29.

Configuration Register

This register controls and configures various functions on

the device.

Address Pointer Register

This register contains the address that selects one of the

other internal registers. When writing to the ADM1031, the

first byte of data is always a register address, which is written

to the address pointer register.

Status Registers

These registers provide status of each limit comparison.

Value and Limit Registers

Theses registers store the results of temperature and fan

speed measurements, along with their limit values.

Fan Speed Configuration Register

This register is used to program the PWM duty cycle for

each fan.

Offset Registers

These registers allow the temperature channel readings to

be offset by a 5−bit twos complement value written to these

registers. These values are automatically added to the

temperature values (or subtracted from if negative). This

allows the systems designer to optimize the system if

required, by adding or subtracting up to 15

°C from a

temperature reading.

Fan Characteristics Registers

These registers are used to select the spin−up time, PWM

frequency, and speed range for the fans used.

THERM Limit Registers

These registers contain the temperature values at which

THERM is asserted.

TMIN/TRANGE Registers

These registers are read/write registers that hold the

minimum temperature value below which the fan does not

run when the device is in automatic fan speed control mode.

These registers also hold the temperature range value that

defines the range over which auto fan control is provided,

and hence determines the temperature at which the fan is run

at full speed.

Serial Bus Interface

Control of the ADM1031 is carried out via the SMBus.

The ADM1031 is connected to this bus as a slave device,

under the control of a master device, for example, the 810

chipset.

The ADM1031 has a 7−bit serial bus address. When the

device is powered up, it does so with a default serial bus

address. The five MSBs of the address are set to 01011; the

two LSBs are determined by the logical state of Pin 13

(ADD). This is a three−state input that can be grounded,

connected to VCC, or left open−circuit to give three different

addresses. The state of the ADD pin is only sampled at

powerup, so changing ADD with power on has no effect

until the device is powered off, then on again.

Table 1. ADD Pin Truth Table

ADD Pin

A1

A0

GND

0

No Connect

1

0

VCC

0

1

If ADD is left open−circuit, then the default address is

0101110. The facility to make hardwired changes at the

ADD pin allows the user to avoid conflicts with other

devices sharing the same serial bus; for example, if more

than one ADM1031 is used in a system.

Serial Bus Protocol

1. The master initiates data transfer by establishing a

START condition, defined as a high−to−low

transition on the serial data line SDA while the

serial clock line SCL remains high. This indicates

that an address/data stream follows. All slave

peripherals connected to the serial bus respond to

the START condition, and shift in the next eight

bits, consisting of a 7−bit address (MSB first) plus

an R/W bit that determines the direction of the

data transfer, that is, whether data is written to or

read from the slave device.

The peripheral whose address corresponds to the

transmitted address responds by pulling the data

line low during the low period before the ninth

clock pulse, known as the Acknowledge Bit. All

other devices on the bus now remain idle while the

selected device waits for data to be read from or

written to it. If the R/W bit is a 0, then the master

writes to the slave device. If the R/W bit is a 1,

then the master reads from the slave device.

2. Data is sent over the serial bus in sequences of

nine clock pulses, eight bits of data, followed by

an acknowledge bit from the slave device.

Transitions on the data line must occur during the

low period of the clock signal and remain stable

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