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MC14034 Datenblatt(PDF) 3 Page - Motorola, Inc |
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MC14034 Datenblatt(HTML) 3 Page - Motorola, Inc |
3 / 9 page MOTOROLA CMOS LOGIC DATA 137 MC14034B SWITCHING CHARACTERISTICS* (CL = 50 pF, TA = 25_C) Characteristic Symbol VDD Vdc Min Typ # Max Unit Output Rise Time A or B tTLH = (3.0 ns/pF) CL + 30 ns tTLH = (1.5 ns/pF) CL + 15 ns tTLH = (1.1 ns/pF) CL + 10 ns tTLH 5.0 10 15 — — — 180 90 65 360 180 130 ns Output Fall Time A or B tTHL = (1.5 ns/pF) CL + 25 ns tTHL = (0.75 ns/pF) CL + 12.5 ns tTHL = (0.55 ns/pF) CL + 9.5 ns tTHL 5.0 10 15 — — — 100 50 40 200 100 80 ns Propagation Delay Time A (B) Synchronous Parallel Data Input, B (A) Parallel Data Output tPLH, tPHL = (1.7 ns/pF) CL + 440 ns tPHL, tPHL = (0.66 ns/pF) CL + 172 ns tPLH, tPHL = (0.5 ns/pF) CL + 120 ns tPLH, tPHL 5.0 10 15 — — — 525 205 145 1050 410 290 ns Propagation Delay Time A (B) Asynchronous Parallel Data Input B (A) Parallel Data Output tPLH, tPHL = (1.7 ns/pF) CL + 420 ns tPLH, tPHL = (0.66 ns/pF) CL + 147 ns tPLH, tPHL = (0.5 ns/pF) CL + 105 ns tPLH, tPHL 5.0 10 15 — — — 505 180 130 1010 360 260 ns Clock Pulse Width tWH 5.0 10 15 340 140 110 170 70 55 — — — ns Clock Pulse Frequency fcl 5.0 10 15 — — — 2.5 6.0 8.0 1.2 3.0 4.0 MHz Clock Pulse Rise tTLH, tTHL 5.0 10 15 — — — — — — 15 5 4 µs A, B Input Setup Time tsu 5.0 10 15 100 45 35 35 15 12 — — — ns High Level SE, P/S, A/S Pulse Width tWH 5.0 10 15 600 270 200 200 90 80 — — — ns * The formulas given are for the typical characteristics only at 25 _C. #Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance. TRUTH TABLE “A” Enable P/S A/B A/S Mode Operation† 0 0 0 X Serial Synchronous Serial data input, A and B Parallel data outputs disabled. 0 0 1 X Serial Synchronous Serial data input, B–Parallel data output. 0 1 0 0 Parallel B Synchronous Parallel data inputs, A–Parallel data outputs disabled. 0 1 0 1 Parallel B Asynchronous Parallel data inputs, A–Parallel data outputs disabled. 0 1 1 0 Parallel A–Parallel data inputs disabled, B–Parallel data outputs. 0 1 1 1 Parallel A–Parallel data inputs disabled, B–Parallel data outputs. 1 0 0 X Serial Synchronous serial data input, A–Parallel data output. 1 0 1 X Serial Synchronous serial data input, B–Parallel data output. 1 1 0 0 Parallel B–Synchronous Parallel data input, A–Parallel data output. 1 1 0 1 Parallel B–Asynchronous Parallel data input, A–Parallel data output. 1 1 1 0 Parallel A–Synchronous Parallel data input, B–Parallel data output. 1 1 1 1 Parallel A–Asynchronous Parallel data input, B–Parallel data output. X = Don’t Care †Outputs change at positive transition of clock in the serial mode and when the A/S input is low in the parallel mode. During transfer from parallel to serial operation, A/S should remain low in order to prevent DS transfer into flip–flops. |
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Ähnliche Beschreibung - MC14034 |
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