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74AHCT273PW Datenblatt(PDF) 8 Page - NXP Semiconductors |
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74AHCT273PW Datenblatt(HTML) 8 Page - NXP Semiconductors |
8 / 18 page 74AHC_AHCT273_3 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 03 — 13 May 2008 8 of 18 NXP Semiconductors 74AHC273; 74AHCT273 Octal D-type flip-flop with reset; positive-edge trigger 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 10. Symbol Parameter Conditions 25 °C −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ[1] Max Min Max Min Max 74AHC273 tpd propagation delay CP to Qn; see Figure 7 [2] VCC = 3.0 V to 3.6 V CL = 15 pF - 6.0 13.6 1.0 16.0 1.0 17.0 ns CL = 50 pF - 8.6 17.1 1.0 19.5 1.0 21.5 ns VCC = 4.5 V to 5.5 V CL = 15 pF - 4.2 9 1.0 10.5 1.0 11.5 ns CL = 50 pF - 6.0 11.0 1.0 12.5 1.0 14.0 ns MR to Qn; see Figure 8 [3] VCC = 3.0 V to 3.6 V CL = 15 pF - 5.1 13.6 1.0 16.0 1.0 17.0 ns CL = 50 pF - 7.3 17.1 1.0 19.5 1.0 21.5 ns VCC = 4.5 V to 5.5 V CL = 15 pF - 3.7 8.5 1.0 10.0 1.0 11.0 ns CL = 50 pF - 5.3 10.5 1.0 12.0 1.0 13.5 ns fmax maximum frequency see Figure 7 VCC = 3.0 V to 3.6 V CL = 15 pF 75 120 - 65 - 65 - MHz CL = 50 pF 50 75 - 45 - 45 - MHz VCC = 4.5 V to 5.5 V CL = 15 pF 120 165 - 100 - 100 - MHz CL = 50 pF 80 110 - 70 - 70 - MHz tW pulse width CP HIGH or LOW; see Figure 7 VCC = 3.0 V to 3.6 V 5.0 - - 6.5 - 6.5 - ns VCC = 4.5 V to 5.5 V 5.0 - - 5.0 - 5.0 - ns MR LOW; see Figure 8 VCC = 3.0 V to 3.6 V 5.0 - - 6.0 - 6.0 - ns VCC = 4.5 V to 5.5 V 5.0 - - 5.0 - 5.0 - ns tsu set-up time Dn to CP; see Figure 9 VCC = 3.0 V to 3.6 V 3.0 - - 3.0 - 3.0 - ns VCC = 4.5 V to 5.5 V 3.0 - - 3.0 - 3.0 - ns th hold time Dn to CP; see Figure 9 VCC = 3.0 V to 3.6 V 1.0 - - 1.0 - 1.0 - ns VCC = 4.5 V to 5.5 V 1.0 - - 1.0 - 1.0 - ns |
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