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74AHCT74D Datenblatt(PDF) 8 Page - NXP Semiconductors

Teilenummer 74AHCT74D
Bauteilbeschribung  Dual D-type flip-flop with set and reset; positive-edge trigger
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Hersteller  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

74AHCT74D Datenblatt(HTML) 8 Page - NXP Semiconductors

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74AHC_AHCT74_5
© NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 05 — 9 June 2008
8 of 18
NXP Semiconductors
74AHC74; 74AHCT74
Dual D-type flip-flop with set and reset; positive-edge trigger
10. Dynamic characteristics
Table 7.
Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 9.
Symbol Parameter
Conditions
25
°C
−40 °C to +85 °C −40 °C to +125 °C Unit
Min Typ[1] Max
Min
Max
Min
Max
74AHC74
tpd
propagation
delay
nCP to nQ, nQ; see Figure 7
[2]
VCC = 3.0 V to 3.6 V
CL = 15 pF
-
5.2
11.9
1.0
14.0
1.0
15.0
ns
CL = 50 pF
-
7.4
15.4
1.0
17.5
1.0
19.5
ns
VCC = 4.5 V to 5.5 V
CL = 15 pF
-
3.7
7.3
1.0
8.5
1.0
9.5
ns
CL = 50 pF
-
5.2
9.3
1.0
10.5
1.0
12.0
ns
nSD, nRD to nQ, nQ;
see Figure 8
VCC = 3.0 V to 3.6 V
CL = 15 pF
-
5.4
12.3
1.0
14.5
1.0
15.5
ns
CL = 50 pF
-
7.7
15.8
1.0
18.0
1.0
20.0
ns
VCC = 4.5 V to 5.5 V
CL = 15 pF
-
3.7
7.7
1.0
9.0
1.0
10.0
ns
CL = 50 pF
-
5.3
9.7
1.0
11.0
1.0
12.5
ns
fmax
maximum
frequency
see Figure 7
VCC = 3.0 V to 3.6 V
CL = 15 pF
80
125
-
45
-
45
-
MHz
CL = 50 pF
50
75
-
70
-
70
-
MHz
VCC = 4.5 V to 5.5 V
CL = 15 pF
130
170
-
110
-
110
-
MHz
CL = 50 pF
90
115
-
75
-
75
-
MHz
tW
pulse width
CP HIGH or LOW;
nSD, nRD LOW;
see Figure 7 and 8
VCC = 3.0 V to 3.6 V
6.0
-
-
7.0
-
7.0
-
ns
VCC = 4.5 V to 5.5 V
5.0
-
-
5.0
-
5.0
-
ns
tsu
set-up time
nD to nCP; see Figure 7
VCC = 3.0 V to 3.6 V
6.0
-
-
7.0
-
7.0
-
ns
VCC = 4.5 V to 5.5 V
5.0
-
-
5.0
-
5.0
-
ns
th
hold time
nD to nCP; see Figure 7
VCC = 3.0 V to 3.6 V
0.5
-
-
0.5
-
0.5
-
ns
VCC = 4.5 V to 5.5 V
0.5
-
-
0.5
-
0.5
-
ns
trec
recovery
time
nRD to nCP; see Figure 8
VCC = 3.0 V to 3.6 V
5.0
-
-
5.0
-
5.0
-
ns
VCC = 4.5 V to 5.5 V
3.0
-
-
3.0
-
3.0
-
ns


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