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74AHCT259 Datenblatt(PDF) 3 Page - NXP Semiconductors |
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74AHCT259 Datenblatt(HTML) 3 Page - NXP Semiconductors |
3 / 17 page 74AHC_AHCT259_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 15 May 2008 3 of 17 NXP Semiconductors 74AHC259; 74AHCT259 8-bit addressable latch 5. Pinning information 5.1 Pinning 5.2 Pin description Fig 3. Functional diagram mna571 8 LATCHES 1-of-8 DECODER Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 12 11 10 9 7 6 5 4 A0 A1 A2 LE MR D 13 15 14 3 2 1 Fig 4. Pin configuration 74AHC259 74AHCT259 A0 VCC A1 MR A2 LE Q0 D Q1 Q7 Q2 Q6 Q3 Q5 GND Q4 001aai126 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 Table 2. Pin description Symbol Pin Description A0 1 address input A1 2 address input A2 3 address input Q0 4 latch output Q1 5 latch output Q2 6 latch output Q3 7 latch output GND 8 ground (0 V) Q4 9 latch output Q5 10 latch output |
Ähnliche Teilenummer - 74AHCT259 |
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