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74AHCT377PW Datenblatt(PDF) 9 Page - NXP Semiconductors |
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74AHCT377PW Datenblatt(HTML) 9 Page - NXP Semiconductors |
9 / 16 page 74AHC_AHCT377_2 © NXP B.V. 2008. All rights reserved. Product data sheet Rev. 02 — 12 June 2008 9 of 16 NXP Semiconductors 74AHC377; 74AHCT377 Octal D-type flip-flop with data enable; positive-edge trigger [1] Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0 V). [2] tpd is the same as tPLH and tPHL. [3] CPD is used to determine the dynamic power dissipation (PD in µW). PD =CPD × VCC2 × fi × N+ Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ(C L × VCC 2 × f o) = sum of the outputs. 74AHCT377; VCC = 4.5 V to 5.5 V tpd propagation delay CP to Qn; see Figure 6 [2] CL = 15 pF - 4.0 9.0 1.0 10.5 1.0 11.5 ns CL = 50 pF - 5.7 10.5 1.0 12.0 1.0 13.5 ns fmax maximum frequency see Figure 6 CL = 15 pF 90 140 - 80 - 80 - MHz CL = 50 pF 85 130 - 75 - 75 - MHz tW pulse width CP HIGH or LOW; see Figure 6 5.0 - - 5.0 - 5.0 - ns tsu set-up time Dn, E to CP; see Figure 7 4.5 - - 4.5 - 4.5 - ns th hold time Dn, E to CP; see Figure 7 2.0 - - 2.0 - 2.0 - ns CPD power dissipation capacitance fi = 1 MHz; VI = GND to VCC [3] -23 - - - - - pF Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 8. Symbol Parameter Conditions 25 °C −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ[1] Max Min Max Min Max |
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