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NBVSPA027LN1TAG Datenblatt(PDF) 1 Page - ON Semiconductor |
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NBVSPA027LN1TAG Datenblatt(HTML) 1 Page - ON Semiconductor |
1 / 8 page © Semiconductor Components Industries, LLC, 2010 December, 2010 − Rev. 1 1 Publication Order Number: NBVSPA015/D NBVSPA015 Series 3.3 V, LVDS Voltage-Controlled Clock Oscillator (VCXO) PureEdge t Product Series The NBVSPXXXX voltage−controlled crystal oscillator (VCXO) devices are designed to meet today’s requirements for 3.3 V LVDS clock generation applications. These devices use a high Q fundamental mode crystal and Phase Locked Loop (PLL) multiplier to provide a wide range of frequencies from 60 MHz to 700 MHz (factory configurable per user specifications) with a pullable range of ±100 ppm and a frequency stability of ±50 ppm. The silicon−based PureEdge t products design provides users with exceptional frequency stability and reliability. They produce an ultra low jitter and phase noise LVDS differential output. The NBVSPXXXX series devices are a member of ON Semiconductor’s PureEdge t clock family that provides accurate and precision clock generation solutions. Available in the industry standard 5.0 x 7.0 x 1.8 mm and in a new smaller 3.2 x 5.0 x 1.2 mm SMD (CLCC) package on 16 mm tape and reel in quantities of 1,000. Features • LVDS Differential Output • Uses High Q Fundamental Mode Crystal • Ultra Low Jitter and Phase Noise − 0.5 ps (12 kHz − 20 MHz) • Factory Configurable Frequencies from 60 MHz to 700 MHz (see Standard Frequencies in the Ordering Information Table on page 6) • Pullable Range Minimum of ±100 ppm • Frequency Stability of ±50 ppm • Control Voltage with Positive Slope • Voltage Control Linearity of ±10% • Hermetically Sealed Ceramic SMD Packages of size 5.0 x 7.0 x 1.8 mm and 3.2 x 5.0 x 1.2 mm • Operating Range: 3.3 V ±10% • These Devices are Pb−Free and are RoHS Compliant Applications • Networking • SONET • 10 Gigabit Ethernet • Networking Base Stations • Broadcasting http://onsemi.com MARKING DIAGRAMS NBVSPXXXX = NBVSPXXXX (±50 ppm) XXX.XXXX = Output Frequency (MHz) A = Assembly Location WL = Wafer Lot YY = Year WW = Work Week G = Pb−Free Package 6 PIN CLCC LN SUFFIX CASE 848AB NBVSPXXXX XXX.XXXX AWLYYWWG 6 PIN CLCC LU SUFFIX CASE 848AC NBVSPXXXX XXX.XXXX AWLYYWWG See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. ORDERING INFORMATION |
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