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74LV4053D Datenblatt(PDF) 2 Page - NXP Semiconductors |
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74LV4053D Datenblatt(HTML) 2 Page - NXP Semiconductors |
2 / 26 page 74LV4053_4 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 04 — 10 August 2009 2 of 26 NXP Semiconductors 74LV4053 Triple single-pole double-throw analog switch 3. Ordering information 4. Functional diagram Table 1. Ordering information Type number Package Temperature range Name Description Version 74LV4053N −40 °C to +125 °C DIP16 plastic dual in-line package; 16 leads (300 mil) SOT38-4 74LV4053D −40 °C to +125 °C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 74LV4053DB −40 °C to +125 °C SSOP16 plastic shrink small outline package; 16 leads; body width 5.3 mm SOT338-1 74LV4053PW −40 °C to +125 °C TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 74LV4053BQ −40 °C to +125 °C DHVQFN16 plastic dual-in line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 × 3.5 × 0.85 mm SOT763-1 Fig 1. Functional diagram 001aak341 LOGIC LEVEL CONVERSION 11 16 VCC 13 1Y1 S1 LOGIC LEVEL CONVERSION DECODER LOGIC LEVEL CONVERSION 12 1Y0 14 1Z 1 2Y1 2 2Y0 15 2Z 3 3Y1 5 3Y0 43Z 10 S2 9 87 VEE GND S3 6 E |
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