ISL2671286IBZ datasheet(4/15 Pages) INTERSIL

Teilenummer	ISL2671286IBZ

Bauteilbeschribung	12-Bit, 20kSPS SAR ADC

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Hersteller	INTERSIL [Intersil Corporation]

Direct Link	http://www.intersil.com/cda/home

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ISL2671286

4

FN7863.0

November 1, 2011

REFERENCE INPUT

REF

REF Input Range

1.25

2.5

VCC + 0.05

V

REFLEAK

Current Drain

CS/SHDN = VCC

-2.5

0.01

2.5

µA

tCYC ≥ 640µs, fCLK ≤ 25kHz

0.06

20

µA

tCYC = 80µs, fCLK= 200kHz

0.5

20

µA

DIGITAL INPUT/OUTPUT

Logic Family

CMOS

VIH

Input High Voltage

3+VCC

V

VIL

Input Low Voltage

0.0

0.8

V

VOH

Output High Voltage

IOH = 250µA

3+VCC

V

VOL

Output Low Voltage

IOL = 250µA

0.0

0.4

V

Data Format

Straight Binary

ILEAK

Input DC Leakage Current

-1

0.01

1

µA

CIN

Input Capacitance

9pF

IOZ

Floating-State Output Leakage

Current

-1

0.01

1

µA

COUT

Floating-State Output Capacitance

6

pF

POWER SUPPLY REQUIREMENTS

+VCC

Power Supply Voltage

4.50

5

5.25

V

VANA

Quiescent Current

tCYC ≥ 640µs, fCLK ≤ 25kHz

280

500

µA

tCYC = 90µs, fCLK= 200kHz

360

600

µA

Power Down

CS/SHDN = VCC

0.5

3

µA

TEMPERATURE RANGE

Specified Performance

-40

+85

°C

NOTES:

8. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.

9. The absolute voltage applied to each analog input must be between GND and +VCC to guarantee datasheet performance.

10. Applies only to +IN.

Electrical Specifications +VCC = +5V, VREF = +5V, fSAMPLE = 12.5kHz, fCLK =16 • fSAMPLE , unless otherwise noted. Typical

values are at TA = +25°C. Boldface limits apply over the operating temperature range, -40°C to +85°C. (Continued)

SYMBOL

PARAMETER

TEST CONDITIONS

MIN

(Note 8)

TYP

MAX

(Note 8)

UNITS

Timing Specifications At fCLK = 200kHz , unless otherwise noted. Typical values are at TA = +25°C. Boldface limits apply over the

operating temperature range, -40°C to +85°C.

SYMBOL

PARAMETER

TEST CONDITIONS

MIN

(Note 8)

TYP

MAX

(Note 8)

UNITS

tSMPL

Analog Input Sample Time

See operating sequence; Figure 3

1.5

2.0

CLK

Cycles

tSMPL (MAX) Maximum Sampling Frequency

20

kHz

tCONV

Conversion Time

See operating sequence; Figure 3

12

CLK

Cycles

tdDO

Delay Time, DCLOCK

↓ to DOUT Data Valid

See test circuits; Figure 4

36

150

ns

tDIS

Delay Time, CS/SHDN

↑ to DOUT Hi-Z

See test circuits; Figure 4 (Note 11)

50

ns

tEN

Delay Time, DCLOCK

↓ to DOUT Enable

See test circuits; Figure 4

21

100

ns

Ähnliche Beschreibung - ISL2671286IBZ

Hersteller	Teilenummer	Datenblatt	Bauteilbeschribung
Intersil Corporation	ISL2671286IBZ	638Kb / 15P	12-Bit, 20kSPS SAR ADC November 1, 2011
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