© Semiconductor Components Industries, LLC, 2006

February, 2006 − Rev. 7

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Publication Order Number:

MC10E016/D

MC10E016, MC100E016

5.0 VECL 8−Bit

Synchronous Binary

Up Counter

Description

The MC10E/100E016 is a high−speed synchronous, presettable,

cascadable 8−bit binary counter. Architecture and operation are the

same as the MC10H016 in the MECL 10H

™ family, extended to

8−bits, as shown in the logic symbol.

The counter features internal feedback of TC, gated by the TCLD

(terminal count load) pin. When TCLD is LOW (or left open, in which

case it is pulled LOW by the internal pull−downs), the TC feedback is

disabled, and counting proceeds continuously, with TC going LOW to

indicate an all−one state. When TCLD is HIGH, the TC feedback

causes the counter to automatically reload upon TC = LOW, thus

be terminated for the count function to operate properly. To minimize

noise and power, unused Q outputs should be left unterminated.

The 100 series contains temperature compensation.

Features

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

MARKING DIAGRAM*

xxx

= 10 or 100

A

= Assembly Location

WL

= Wafer Lot

YY

= Year

WW

= Work Week

G= Pb−Free Package

PLCC−28

FN SUFFIX

CASE 776

MCxxxE016G

AWLYYWW

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http://onsemi.com

*For additional marking information, refer to

Application Note AND8002/D.

See detailed ordering and shipping information in the package

dimensions section on page 10 of this data sheet.

ORDERING INFORMATION