SN74AHCT1G126-Q1

SINGLE BUS BUFFER GATE

WITH 3-STATE OUTPUT

SCLS505B − JUNE 2003 − REVISED FEBRUARY 2008

1

POST OFFICE BOX 655303

MIL-STD-883, Method 3015; Exceeds 200 V

Using Machine Model (C = 200 pF, R = 0),

1000-V Charged-Device Model

CC

description/ordering information

The SN74AHCT1G126 is a single bus buffer gate/line driver with 3-state output. The output is disabled when

the output-enable (OE) input is low. When OE is high, true data is passed from the A input to the Y output.

To ensure the high-impedance state during power up or power down, OE should be tied to GND through a

pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the

driver.

ORDERABLE

PART NUMBER

TOP-SIDE

−40

°C to 125°C

SOT (SC-70) − DCK

Reel of 3000

CAHCT1G126QDCKRQ1

BN_

document, or see the TI web site at http://www.ti.com.

FUNCTION TABLE

INPUTS

OUTPUT

OE

A

OUTPUT

Y

H

H

H

H

LL

L

X

Z

logic diagram (positive logic)

AY

OE

1

24

Copyright

 2008, Texas Instruments Incorporated

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of Texas Instruments

standard warranty. Production processing does not necessarily include

testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

DCK PACKAGE

(TOP VIEW)

1

2

3

5

4

OE

A

GND

Y