Datenblatt-Suchmaschine für elektronische Bauteile |
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AD9059 Datenblatt(PDF) 8 Page - Analog Devices |
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AD9059 Datenblatt(HTML) 8 Page - Analog Devices |
8 / 12 page AD9059 –8– REV. 0 Power Dissipation The power dissipation of the AD9059 is specified to reflect a typical application setup under the following conditions: en- code is 60 MSPS, analog input is –0.5 dBFS at 10.3 MHz, VD is +5 V, VDD is +3 V, and digital outputs are loaded with 7 pF typical (10 pF maximum). The actual dissipation will vary as these conditions are modified in user applications. Figure 8 shows typical power consumption for the AD9059 versus ADC encode frequency and VDD supply voltage. 28 1 3 1k Ω 1k Ω AINA AINB VREF AD9059 0.1µF 0.1µF 0.1µF +5V VINA (1V p-p) EXTERNAL VREF (OPTIONAL) VINB (1V p-p) Figure 14. Capacitively Coupled AD9059 A power-down function allows users to reduce power dissipa- tion when ADC data is not required. A TTL/CMOS HIGH signal (PWRDN) shuts down portions of the dual ADC and brings total power dissipation to less than 10 mW. The internal bandgap voltage reference remains active during power-down mode to minimize ADC reactivation time. If the power-down function is not desired, Pin 3 should be tied to ground. Both ADC channels are controlled simultaneously by the PWRDN pin; they cannot be shut down or turned on independently. Applications The wide analog bandwidth of the AD9059 makes it attractive for a variety of high performance receiver and encoder applica- tions. Figure 16 shows the dual ADC in a typical low cost I & Q demodulator implementation for cable, satellite, or wireless LAN modem receivers. The excellent dynamic performance of the ADC at higher analog input frequencies and encode rates empowers users to employ direct IF sampling techniques (refer to Figure 3, Spectral Plot). IF sampling eliminates or simplifies analog mixer and filter stages to reduce total system cost and power. 28 1 10k Ω 1k Ω AINA AINB VREF AD9059 0.1µF +5V VINA VINB (–0.5V TO +0.5V) 10k Ω +5V +5V AD8041 AD8041 1k Ω 1k Ω 1k Ω 3 Figure 15. DC Coupled AD9059 (VIN Inverted) AD9059 BPF BPF 90 ° VCO IF IN VCO ADC ADC Figure 16. I and Q Digital Receiver The high sampling rate and analog bandwidth of the AD9059 are ideal for computer RGB video digitizer applications. With a full-power analog bandwidth of 2 × the maximum sampling rate, the ADC provides sufficient pixel-to-pixel transient settling time to ensure accurate 60 MSPS video digitization. Figure 17 shows a typical RGB video digitizer implementation for the AD9059. 8 RED GREEN AD9059 BLUE AD9059 H-SYNC PLL PIXEL CLOCK 8 8 ADC ADC ADC ADC Figure 17. RGB Video Encoder |
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