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TS3006 Datenblatt(PDF) 7 Page - Touchstone Semiconductor Inc |
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TS3006 Datenblatt(HTML) 7 Page - Touchstone Semiconductor Inc |
7 / 9 page TS3006 TS3006DS r1p0 Page 7 RTDFS THEORY OF OPERATION The TS3006 is a user-programmable oscillator where the period of the square wave at its FOUT terminal is generated by an external resistor connected to the RSET pin. The output frequency is given by: O T 1.0 11 RS T Equation 1. FOUT Frequency Calculation With an RSET = 4.32MΩ, the output frequency is approximately 25kHz with a 50% duty cycle. As design aids, Tables 1 lists TS3006 ’s typical O T for various standard values for RSET. Connect CPWM to VDD to disable the PWM function and in turn, save power. Connect PWM_CNTRL to VDD for a fixed PWMOUT output pulse width, which is determined by the CPWM pin capacitor only. APPLICATIONS INFORMATION Minimizing Power Consumption To keep the TS3006 ’s power consumption low, resistive loads at the FOUT and PWMOUT terminals increase dc power consumption and therefore should be as large as possible. Capacitive loads at the FOUT and PWMOUT terminals increase the TS3006 ’s transient power consumption and, as well, should be as small as possible. One challenge to minimizing the TS3006 ’s transient power consumption is the probe capacitance of oscilloscopes and frequency counter instruments. Most instruments exhibit an input capacitance of 15pF or more. Unless buffered, the increase in transient load current can be as much as 400nA. To minimize capacitive loading, the technique shown in Figure 1 can be used. In this circuit, the principle of series-connected capacitors can be used to reduce the effective capacitive load at the TS3006 ’s O T and PWMOUT terminals. To determine the optimal value for CEXT once the probe capacitance is known by simply solving for CEXT using the following expression: or example, if the instrument’s input probe capacitance is 15pF and the desired effective load capacitance at either or both FOUT and PWMOUT terminals is to be ≤5p , then the value of C EXT should be ≤7.5p . TS3006 Start-up Time As the TS3006 is powered up, its FOUT terminal (and PWMOUT terminal, if enabled) is active once the applied VDD is higher than 1.55V. Once the applied VDD is higher than 1.55V, the master oscillator achieves steady-state operation within 8ms. RSET (MΩ) FOUT (kHz) 0.360 300 1 108 2.49 43.37 4.32 25 6.81 15.86 9.76 11.07 12 9 Table 1: FOUT vs RSET C T = 1 1 C OAD 1 C RO Equation 2: External Capacitor Calculation Figure 1: Using an External Capacitor in Series with Probes Reduces Effective Capacitive Load. |
Ähnliche Teilenummer - TS3006 |
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Ähnliche Beschreibung - TS3006 |
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