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MC12311CHN Datenblatt(PDF) 11 Page - Freescale Semiconductor, Inc |
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MC12311CHN Datenblatt(HTML) 11 Page - Freescale Semiconductor, Inc |
11 / 40 page MC12311 Advance Information, Rev. 1.0 Freescale Semiconductor 11 45 VR_DIG Power Output Transceiver regulated output voltage for digital circuitry. Decouple to ground with 100 nF capacitor 46 XTA Xtal Osc Transceiver crystal reference oscillator Connect to 32 MHz crystal and load capacitor 47 XTB Xtal Osc Transceiver crystal reference oscillator Connect to 32 MHz crystal and load capacitor 48 RESET Digital Input Transceiver hardware reset input Typically driven from MCU GPIO 49 DIO0/PTD1/KBI2P1 Digital Input/Output Transceiver GPIO Bit 0 / MCU Port D Bit 1 / MCU KBI2 Bit 1 MCU IO and Transceiver IO connected onboard MC12311 50 DIO1/PTD0/KBI2P0 Digital Input/Output Transceiver GPIO Bit 1 / MCU Port D Bit 0 / MCU KBI2 Bit 0 MCU IO and Transceiver IO connected onboard MC12311 51 DIO2 Digital Input/Output Transceiver GPIO Bit 2 52 DIO3 Digital Input/Output Transceiver GPIO Bit 3 53 DIO4 Digital Input/Output Transceiver GPIO Bit 4 54 DIO5/CLKOUT Digital Input/Output Transceiver GPIO Bit 5 / ClkOut Commonly programmed as ClkOut to supply MCU clock; connect to Pin 5 55 VDD1 Power Input MCU VDD supply Connect to MC12311 VDD supply 56 VDDAD Power Input MCU ADC VDD Connect to MC12311 VDD supply 57 SPSCK2 Digital Input/Output SPI Port Clock driven from MCU Port E Bit 0 • MCU IO and Transceiver IO connected onboard MC12311 • MCU IO must be configured for this connection 58 MOSI2 Digital Input/Output SPI Port MOSI signal connected to MCU Port E Bit 1 • MCU IO and Transceiver IO connected onboard MC12311 • MCU IO must be configured for this connection 59 NSS2 Digital Input/Output SPI Port SS signal connected to MCU Port E Bit 3 • MCU IO and Transceiver IO connected onboard MC12311 • MCU IO must be configured for this connection 60 MISO2 Digital Input/Output SPI Port MISO signal connected to MCU Port E Bit 2 • MCU IO and Transceiver IO connected onboard MC12311 • MCU IO must be configured for this connection FLAG VSS Power input External package flag. Common VSS Connect to ground. 1 IIC pins, SCL and SDA can be repositioned using the IICPS bit in SOPT2; default locations are PTA3 and PTA2. 2 The SPI Port pin selection must be configured by software by writing the SPIPS Bit in Register SOPT2 3 If ADC and ACMP1 are both enabled, both modules have access to the pin. Table 1. Pin Function Description (continued) Pin # Pin Name Type Description Functionality |
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