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74LVC14APW Datenblatt(PDF) 3 Page - NXP Semiconductors |
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74LVC14APW Datenblatt(HTML) 3 Page - NXP Semiconductors |
3 / 18 page 74LVC14A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 5 — 23 December 2011 3 of 18 NXP Semiconductors 74LVC14A Hex inverting Schmitt trigger with 5 V tolerant input 6. Pinning information 6.1 Pinning 6.2 Pin description 7. Functional description [1] H = HIGH voltage level; L = LOW voltage level (1) This is not a supply pin. The substrate is attached to this pad using conductive die attach material. There is no electrical or mechanical requirement to solder this pad. However, if it is soldered, the solder land should remain floating or be connected to GND. Fig 4. Pin configuration SO14, SSOP14 and TSSOP14 Fig 5. Pin configuration DHVQFN14 14A 1A VCC 1Y 6A 2A 6Y 2Y 5A 3A 5Y 3Y 4A GND 4Y 001aac518 1 2 3 4 5 6 7 8 10 9 12 11 14 13 001aac519 14A GND(1) Transparent top view 3Y 4A 3A 5Y 2Y 5A 2A 6Y 1Y 6A 6 9 5 10 4 11 3 12 2 13 terminal 1 index area Table 2. Pin description Symbol Pin Description 1A, 2A, 3A, 4A, 5A, 6A 1, 3, 5, 9, 11, 13 data input 1Y, 2Y, 3Y, 4Y, 5Y, 6Y 2, 4, 6, 8, 10, 12 data output GND 7 ground (0 V) VCC 14 supply voltage Table 3. Function table[1] Input nA Output nY LH HL |
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