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LM22675 Datenblatt(PDF) 8 Page - Texas Instruments

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Teilenummer LM22675
Bauteilbeschribung  Wide Input Voltage Range: 4.5V to 42V, Internally Compensated Voltage Mode Control
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EN
Vin
RENB
RENT
LM22675
SNVS591K – SEPTEMBER 2008 – REVISED MARCH 2013
www.ti.com
Although an internal pull-up is provided on the EN pin, it is good practice to pull the input high, when this feature
is not used, especially in noisy environments. This can most easily be done by connecting a resistor between
VIN and the EN pin. The resistor is required, since the internal zener diode, at the EN pin, will conduct for
voltages above about 6V. The current in this zener must be limited to less than 100 µA. A resistor of 470 k
Ω will
limit the current to a safe value for input voltages as high 42V. Smaller values of resistor can be used at lower
input voltages.
The LM22675 also incorporates an input under voltage lock-out (UVLO) feature. This prevents the regulator from
turning on when the input voltage is not great enough to properly bias the internal circuitry. The rising threshold is
4.3V (typ.) while the falling threshold is 3.9V (typ.). In some cases these thresholds may be too low to provide
good system performance. The solution is to use the EN input as an external UVLO to disable the part when the
input voltage falls below a lower boundary. This is often used to prevent excessive battery discharge or early
turn-on during start-up. This method is also recommended to prevent abnormal device operation in applications
where the input voltage falls below the minimum of 4.5V. Figure 12 shows the connections to implement this
method of UVLO. The following equations can be used to determine the correct resistor values:
(1)
(2)
Where Voff is the input voltage where the regulator shuts off, and Von is the voltage where the regulator turns on.
Due to the 6 µA pull-up, the current in the divider should be much larger than this. A value of 20 k
Ω, for RENB is a
good first choice. Also, a zener diode may be needed between the EN pin and ground, in order to comply with
the absolute maximum ratings on this pin.
Figure 12. External UVLO Connections
Duty Cycle Limits
Ideally the regulator would control the duty cycle over the full range of zero to one. However due to inherent
delays in the circuitry, there are limits on both the maximum and minimum duty cycles that can be reliably
controlled. This in turn places limits on the maximum and minimum input and output voltages that can be
converted by the LM22675. A minimum on-time is imposed by the regulator in order to correctly measure the
switch current during a current limit event. A minimum off-time is imposed in order the re-charge the bootstrap
capacitor. The following equation can be used to determine the approximate maximum input voltage for a given
output voltage:
(3)
Where Fsw is the switching frequency and TON is the minimum on-time; both found in the Electrical
Characteristics table. The worst case occurs at the lowest output voltage. If the input voltage, found in the above
equation, is exceeded, the regulator will skip cycles, effectively lowering the switching frequency. The
consequences of this are higher output voltage ripple and a degradation of the output voltage accuracy.
The second limitation is the maximum duty cycle before the output voltage will "dropout" of regulation. The
following equation can be used to approximate the minimum input voltage before dropout occurs:
8
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