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ADMP621ACEZ-RL7 Datenblatt(PDF) 4 Page - Analog Devices

Teilenummer ADMP621ACEZ-RL7
Bauteilbeschribung  Wide Dynamic Range Microphone with PDM Digital Output
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ADMP621ACEZ-RL7 Datenblatt(HTML) 4 Page - Analog Devices

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ADMP621
Data Sheet
TIMING CHARACTERISTICS
Table 2.
Parameter
Description
Min
Typ
Max
Unit
SLEEP MODE
Sleep Time
Time from CLK falling < 1 kHz
1
ms
Wake-Up Time
Time from CLK rising > 1 kHz to output within 3 dB of final sensitivity, power on
25
ms
INPUT
tCLKIN
Input clock period
270
1000
ns
Clock Frequency (CLK)
1.0
3.0721
3.6
MHz
Clock Duty Ratio
40
60
%
OUTPUT
t1OUTEN
DATA1 (right) driven after falling clock edge
31
ns
t1OUTDIS
DATA1 (right) disabled after rising clock edge
5
23
ns
t2OUTEN
DATA2 (left) driven after rising clock edge
31
ns
t2OUTDIS
DATA2 (left) disabled after falling clock edge
5
26
ns
1
The microphone operates at any clock frequency between 1.0 MHz and 3.6 MHz. Some specifications may not be guaranteed at frequencies other than 3.072 MHz.
Timing Diagram
tCLKIN
CLK
DATA2
DATA1
t2OUTDIS
t1OUTDIS
t2OUTEN
t1OUTEN
Figure 3. Pulse Density Modulated Output Timing
Rev. 0 | Page 4 of 16


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