Datenblatt-Suchmaschine für elektronische Bauteile |
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ML4821 Datenblatt(PDF) 6 Page - Fairchild Semiconductor |
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ML4821 Datenblatt(HTML) 6 Page - Fairchild Semiconductor |
6 / 12 page ML4821 PRODUCT SPECIFICATION 6 REV. 1.0.2 6/19/01 Functional Description Oscillator The ML4821 oscillator charges the external capacitor connected to CT with a current equal to 2.5/RT. When the capacitor voltage reaches the upper threshold, the compara- tor changes state and the capacitor discharges to the lower threshold through Q1. The oscillator period can be described by the following relationship: TOSC = TRAMP + TDISCHARGE where: TRAMP = C(Ramp Valley to Peak) ÷ (IRT/2) and: TDISCHARGE = C(Ramp Valley to Pk) ÷ (8.4mA – IRT/2) The ML4821 oscillator includes a SYNC input for synchro- nizing to an external frequency source. A positive pulse on this pin of 2V (typ) resets the oscillators comparator and initiates a discharge cycle for CT. The RT and CT component values which set the ML4821 oscillator frequency should be selected to produce a lower frequency than the external frequency source. VOLTAGE and Current ERROR Amplifiers The ML4821 voltage error amplifier is a high open loop gain, wide bandwidth amplifier with a class A output. The soft start circuit controls the input to this amplifier for closed loop soft start operation. The current error amplifier (IA) is similar to the voltage error amplifier but is designed for very low offsets to allow the selection of a low value resistor for RSENSE. Output Driver Stage The ML4821 Output Driver is a 1A peak output high speed totem pole circuit designed to quickly drive capacitive loads, such as power MOSFET gates. The driver circuit’s output voltage is internally limited to 17V. Gain Modulator The ML4821 gain modulator responds linearly to current injected into the ISINE pin, and in an inverse-square fashion to voltage on the VRMS pin. At very low voltages on the VRMS pin, the gain modulator enforces a power limit, or ”brown- out protection”, upon the overall PFC circuit (Figures 6 and 7). The rectified line input sine wave is converted to a current for the ISINE input via a dropping resistor. In this way, most ground noise produces an insignificant effect on the refer- ence to the PWM comparator. This gives the ML4821 a high degree of immunity to the disturbances common in high- power switching circuits. CLOCK tD CT RAMP PEAK RAMP VALLEY Figure 1. Oscillator Block Diagram Figure 2. Oscillator Timing Resistance vs. Frequency RT + – RT CT CT VREF 8.4mA Q1 Q2 1k Ω 2k Ω SYNC IRT 2 IRT 1000 100 10 010 20 1nF 30 40 50 RT (kΩ) 680pF 470pF 330pF 150pF |
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Ähnliche Beschreibung - ML4821 |
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