Aero I

6

Rev. 1.0

Table 4. AC Characteristics

Parameter

Symbol

Test Condition

Min

Typ

Max

Unit

SCLK Cycle Time

Figures 1, 3

35

—

—

ns

SCLK Rise Time

Figures 1, 3

—

—

50

ns

SCLK Fall Time

Figures 1, 3

—

—

50

ns

SCLK High Time

Figures 1, 3

10

—

—

ns

SCLK Low Time

Figures 1, 3

10

—

—

ns

PDN Rise Time

Figure 2

—

—

10

ns

PDN Fall Time

Figure 2

—

—

10

ns

SDI Setup Time to SCLK

↑

Figure 3

15

—

—

ns

SDI Hold Time from SCLK

↑

Figure 3

10

—

—

ns

SEN

↓ to SCLK↑ Delay Time

Figure 3

10

—

—

ns

SCLK

↑ to SEN↑ Delay Time

Figures 3, 4

12

—

—

ns

SEN

↑ to SCLK↑ Delay Time

Figures 3, 4

12

—

—

ns

Figures 3, 4

10

—

—

ns

DGAIN bits only

130

—

—

µs

Option 2 only

10

—

—

ns

SCLK

↓ to SDO Time

Figure 4

—

—

27

ns

——

5

pF

10

15

20

k

Ω

710

14

pF

0.5

—

—

XSEL = 0, DIV2 = 0

—

13

—

MHz

XSEL = 1, DIV2 = 1

—

26

—

MHz

Notes:

1. Two programming options are allowed for SEN. Either option may be used. In both cases, the SEN pulse width must be

at least 10 ns after writing all registers except after DGAIN is written. After DGAIN is written, SEN must be held high for

at least 130

µs. See “AN50: Aero Transceiver Programming Guide.”

2. For pins SCLK, SDI, SEN, XEN, and PDN.

3. For XIN pin.

4. The XSEL and