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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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AD5520JST Datenblatt(PDF) 6 Page - Analog Devices |
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AD5520JST Datenblatt(HTML) 6 Page - Analog Devices |
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6 / 24 page  AD5520 Rev. B | Page 6 of 24 TIMING CHARACTERISTICS AVCC = +15 V ± 5%, AVEE = −15 V ± 5%, AGND = 0 V, REFGND = 0 V, DGND = 0 V. All specifications 0°C to 70°C, unless otherwise noted.1, 2 Table 2. DVDD Parameter 5 V ± 10% 3.3 V Unit Conditions/Comments t1 0 0 ns min CS falling edge to STB falling edge setup time t2 30 200 ns min STB pulse width t3 40 70 ns min STB rising edge to CS rising edge setup time t4 0 40 ns min Data setup time t5 550 560 ns min CS falling edge to CPCK rising edge setup time t6 320 320 ns min CPCK pulse width t7 450 500 ns min CPCK to STB falling edge setup time t8 150 800 ns min STB rising edge to QMx, CLxDETECT valid t9 100 440 ns min STB rising edge to CPOH, CPOL valid t10 240 240 μs min Comparator setup time, MODE2, MODE3 settling t11 150 500 ns min Comparator hold time t12 100 440 ns min Comparator output delay time t13 320 320 ns min Comparator strobe pulse width 1 See Figure 2. 2 All input signals are specified with tr = tf = 1 ns (10% to 90% of VDD) and timed from a voltage level of (VIL + VIH)/2. CPCK AMx, ACx, FSEL, MSEL, CPSEL CS QM4, QM5, CLHDETECT, CLLDETECT CPOL, CPOH STB t2 t1 t3 t6 t5 t7 t4 t6 t9 Figure 2. Timing Diagram CPCK CPOH, CPOL MEASVOUT OR MEASIOUT t11 t12 t10 t13 Figure 3. Comparator Timing |
Ähnliche Teilenummer - AD5520JST |
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Ähnliche Beschreibung - AD5520JST |
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