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74LVC125ADB Datenblatt(PDF) 8 Page - NXP Semiconductors |
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74LVC125ADB Datenblatt(HTML) 8 Page - NXP Semiconductors |
8 / 16 page 74LVC125A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 7 — 11 April 2013 8 of 16 NXP Semiconductors 74LVC125A Quad buffer/line driver with 5 V tolerant input/outputs; 3-state Test data is given in Table 9. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig 8. Test circuit for measuring switching times VM VM tW tW 10 % 90 % 0 V VI VI negative pulse positive pulse 0 V VM VM 90 % 10 % tf tr tr tf 001aae331 VEXT VCC VI VO DUT CL RT RL RL G Table 9. Test data Supply voltage Input Load VEXT VI tr, tf CL RL tPLH, tPHL tPLZ, tPZL tPHZ, tPZH 1.2 V VCC 2 ns 30 pF 1 k open 2 V CC GND 1.65 V to 1.95 V VCC 2 ns 30 pF 1 k open 2 V CC GND 2.3 V to 2.7 V VCC 2 ns 30 pF 500 open 2 V CC GND 2.7V 2.7V 2.5 ns 50 pF 500 open 2 V CC GND 3.0Vto 3.6V 2.7V 2.5 ns 50 pF 500 open 2 V CC GND |
Ähnliche Teilenummer - 74LVC125ADB |
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Ähnliche Beschreibung - 74LVC125ADB |
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