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BD0205F5050AHF Datenblatt(PDF) 4 Page - Anaren Microwave |
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BD0205F5050AHF Datenblatt(HTML) 4 Page - Anaren Microwave |
4 / 6 page Visit us at www.anaren.com USA/Canada: Toll Free: Europe: Asia: (315) 432-8909 (800) 411-6596 +44 2392-232392 +86 512-62749282 Model BD0205F5050AHF Rev. A Application in ADC Frontend: Modern Analog-to-Digital Converter (ADC) system often uses differential architecture to suppress the even-order harmonics. The performance of ADC system is heavily influenced by amplitude and phase imbalances arising from the ADC frontend, especially in high frequency applications. Anaren’s multi-layer balun BD0205F5050AHF offers superb amplitude and phase balance performance over wide frequency range, translating to excellent SFDR performance of the ADC system. BD0205F5050AHF is a ferrite free design eliminating related inter-modulation and other non-linear effects. BD0205F5050AHF provides wideband impedance match, resulting in improvement of gain flatness at high frequencies, which in turn reduces input drive requirement. Anaren’s highly repeatable manufacturing process results in little part to part variation, ensuring consistent performance in production. The schematic of a typical ADC front end application is shown below. In conjunction with many high speed ADC ICs, a bandwidth of 70MHz to 250MHz can be obtained for -1dB ripple of gain flatness. Differential load R1 and R2 are 33 ohm, slightly higher than the theoretical 25 ohm, to increase the voltage gain and reduce the required input drive, while keeping acceptable return loss. Optional series resistors, R5, R6, R7 and R8 are used to limit the amount of charge injection from the unbuffered ADC back into the analog input. Optional RC circuits, R3, R4, C4 and C5 further improve SDFR in many circumstances by supplying an additional current path to neutralize the charge injection. Typical ADC frontend schematic using BD0205F5050AHF |
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