Datenblatt-Suchmaschine für elektronische Bauteile |
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LM3263 Datenblatt(PDF) 3 Page - Texas Instruments |
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LM3263 Datenblatt(HTML) 3 Page - Texas Instruments |
3 / 40 page LM3263 www.ti.com SNVS837 – JUNE 2013 PIN DESCRIPTIONS Pin # Name Description A1 PVIN Power Supply Voltage Input to the internal PFET switch. B1 VIO functions as the RFFE interface reference voltage. VIO also functions as reset and enable C1 VIO input to the LM3263. Typically connected to voltage regulator controlled by RF or Baseband IC. Digital control interface RFFE Bus clock input. Typically connected to RFFE master on RF or D1 SCLK Baseband IC. SCLK must be held low when VIO is not applied. A2 SW Switching Node connection to the internal PFET switch and NFET synchronous rectifier. B2 Digital control interface RFFE Bus data input/output. Typically connected to RFFE master on C2 SDATA RF or Baseband IC. SDATA must be held low when VIO is not applied. D2 GPO1 General Purpose Output. Also used to reconfigure USID. A3 PGND Power Ground to the internal NFET switch. B3 BGND ACB, Analog Bypass Ground and Digital Ground. C3 FB Feedback Analog Input. Connect to the output at the output filter capacitor. D3 SGND Signal Analog Ground (Low Current). A4 ACB ACB and Analog Bypass output. Connect to the output at the output filter capacitor. C4 B4 PACB ACB Power Supply Input. D4 SVDD Analog Power Supply Voltage. Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback 3 Product Folder Links: LM3263 |
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