Datenblatt-Suchmaschine für elektronische Bauteile |
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TL16C752BLPTREP Datenblatt(PDF) 1 Page - Texas Instruments |
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TL16C752BLPTREP Datenblatt(HTML) 1 Page - Texas Instruments |
1 / 40 page 14 15 RESET DTRB DTRA RTSA OPA RXRDYA INTA INTB A0 A1 A2 NC 36 35 34 33 32 31 30 29 28 27 26 25 16 1 2 3 4 5 6 7 8 9 10 11 12 D5 D6 D7 RXB RXA TXRDYB TXA TXB OPB CSA CSB NC 17 18 19 20 47 46 45 44 43 48 42 40 39 38 41 21 22 23 24 37 13 PACKAGE (TOP VIEW) NC − No internal connection TL16C752B-EP www.ti.com SGLS153B – FEBRUARY 2003 – REVISED DECEMBER 2007 3.3 V DUAL UART WITH 64-BYTE FIFO Check for Samples: TL16C752B-EP 1 FEATURES • Controlled Baseline • Fast Access Time 2 Clock Cycle IOR/IOW Pulse Width – One Assembly Site • Programmable Sleep Mode – Test Site • Programmable Serial Interface Characteristics – One Fabrication Site – 5-Bit, 6-Bit, 7-Bit, or 8-Bit Characters • Extended Temperature Performance of –55°C to 110°C and –40°C to 105°C – Even, Odd, or No Parity Bit Generation and Detection • Enhanced Diminishing Manufacturing Sources (DMS) Support – 1, 1.5, or 2 Stop Bit Generation • Enhanced Product Change Notification • False Start Bit Detection • Qualification Pedigree (1) • Complete Status Reporting Capabilities in Both Normal and Sleep Mode • Pin Compatible With ST16C2550 With Additional Enhancements • Line Break Generation and Detection • Up to 1.5-Mbps Baud Rate When Using Crystal • Internal Test and Loopback Capabilities (24-MHz Input Clock) • Fully Prioritized Interrupt System Controls • Up to 3-Mbps Baud Rate When Using • Modem Control Functions (CTS, RTS, DSR, Oscillator or Clock Source (48-MHz Input DTR, RI, and CD) Clock) • 64-Byte Transmit FIFO • 64-Byte Receive FIFO With Error Flags • Programmable and Selectable Transmit and Receive FIFO Trigger Levels for DMA and Interrupt Generation • Programmable Receive FIFO Trigger Levels for Software/Hardware Flow Control • Software/Hardware Flow Control – Programmable Xon/Xoff Characters – Programmable Auto-RTS and Auto-CTS • Optional Data Flow Resume by Xon Any Character • DMA Signaling Capability for Both Received and Transmitted Data • Supports 3.3-V Operation • Software Selectable Baud Rate Generator • Prescaler Provides Additional Divide By Four Function (1) Component qualification in accordance with JEDEC and industry standards to ensure reliable operation over an extended temperature range. This includes, but is not limited to, Highly Accelerated Stress Test (HAST) or biased 85/85, temperature cycle, autoclave or unbiased HAST, electromigration, bond intermetallic life, and mold compound life. Such qualification testing should not be viewed as justifying use of this component beyond specified performance and environmental limits. 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Copyright © 2003–2007, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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