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CA3318CM Datenblatt(PDF) 1 Page - Intersil Corporation

Teilenummer CA3318CM
Bauteilbeschribung  CMOS Video Speed, 8-Bit, Flash A/D Converter
Download  12 Pages
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Hersteller  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

CA3318CM Datenblatt(HTML) 1 Page - Intersil Corporation

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4-9
August 1997
CA3318
CMOS Video Speed,
8-Bit, Flash A/D Converter
File Number
3103.1
Features
• CMOS Low Power with SOS Speed (Typ). . . . . . . . 150mW
• Parallel Conversion Technique
• 15MHz Sampling Rate (Conversion Time) . . . . . . . 67ns
• 8-Bit Latched Three-State Output with Overflow Bit
• Accuracy (Typ) . . . . . . . . . . . . . . . . . . . . . . . . . .
±1 LSB
• Single Supply Voltage . . . . . . . . . . . . . . . . . . 4V to 7.5V
• 2 Units in Series Allow 9-Bit Output
• 2 Units in Parallel Allow 30MHz Sampling Rate
Applications
• TV Video Digitizing (Industrial/Security/Broadcast)
• High Speed A/D Conversion
• Ultrasound Signature Analysis
• Transient Signal Analysis
• High Energy Physics Research
• General-Purpose Hybrid ADCs
• Optical Character Recognition
• Radar Pulse Analysis
• Motion Signature Analysis
µP Data Acquisition Systems
Description
The CA3318 is a CMOS parallel (FLASH) analog-to-digital
converter designed for applications demanding both low
power consumption and high speed digitization.
The CA3318 operates over a wide full scale input voltage
range of 4V up to 7.5V with maximum power consumption
depending upon the clock frequency selected. When
operated from a 5V supply at a clock frequency of 15MHz,
the typical power consumption of the CA3318 is 150mW.
The intrinsic high conversion rate makes the CA3318 ideally
suited for digitizing high speed signals. The overflow bit
makes possible the connection of two or more CA3318s in
series to increase the resolution of the conversion system. A
series connection of two CA3318s may be used to produce a
9-bit high speed converter. Operation of two CA3318s in
parallel doubles the conversion speed (i.e., increases the
sampling rate from 15MHz to 30MHz).
256 paralleled auto balanced voltage comparators measure
the input voltage with respect to a known reference to
produce the parallel bit outputs in the CA3318.
255 comparators are required to quantize all input voltage
levels in this 8-bit converter, and the additional comparator is
required for the overflow bit.
Ordering Information
Pinout
CA3318
(PDIP, SBDIP, SOIC)
TOP VIEW
PART NUMBER LINEARITY (INL, DNL)
SAMPLING RATE
TEMP. RANGE (oC)
PACKAGE
PKG. NO.
CA3318CE
±1.5 LSB
15MHz (67ns)
-40 to 85
24 Ld PDIP
E24.6
CA3318CM
±1.5 LSB
15MHz (67ns)
-40 to 85
24 Ld SOIC
M24.3
CA3318CD
±1.5 LSB
15MHz (67ns)
-40 to 85
24 Ld SBDIP
D24.6
1
2
3
4
5
6
7
8
9
10
11
12
16
17
18
19
20
21
22
23
24
15
14
13
(LSB) B1
B2
B3
B4
B5
B6
B7
(MSB) B8
OVERFLOW
1/
4R
(DIG. GND) VSS
(DIG. SUP.) VDD
VAA+ (ANA. SUP.)
VREF+
VIN
p
PHASE
VAA- (ANA. GND)
VREF -
CE1
CE2
3/
4R
CLK
VIN
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207
| Copyright
© Intersil Corporation 1999


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