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74AHC_AHCT573 Datenblatt(PDF) 5 Page - NXP Semiconductors |
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74AHC_AHCT573 Datenblatt(HTML) 5 Page - NXP Semiconductors |
5 / 19 page 74AHC_AHCT573 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 7 — 8 November 2011 5 of 19 NXP Semiconductors 74AHC573; 74AHCT573 Octal D-type transparant latch; 3-state 6. Functional description [1] H = HIGH voltage level; h = HIGH voltage level one set-up time prior to the HIGH-to-LOW LE transition; L = LOW voltage level; l = LOW voltage level one set-up time prior to the HIGH-to-LOW LE transition; Z = high-impedance OFF-state. 7. Limiting values [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For SO20 packages: above 70 C the value of P tot derates linearly at 8 mW/K. For TSSOP20 packages: above 60 C the value of P tot derates linearly at 5.5 mW/K. For DHVQFN20 packages: above 60 C the value of P tot derates linearly with 4.5 mW/K. Table 3. Function table[1] Operating mode Input Internal latch Output OE LE Dn Qn Enable and read register (transparent mode) LH L L L HH H Latch and read register L L l L L hH H Latch register and disable outputs H L l L Z hH Z Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit VCC supply voltage 0.5 +7.0 V VI input voltage 0.5 +7.0 V IIK input clamping current VI < 0.5 V [1] 20 - mA IOK output clamping current VO < 0.5 V or VO >VCC +0.5 V [1] 20 +20 mA IO output current VO = 0.5 V to (VCC +0.5 V) 25 +25 mA ICC supply current - +75 mA IGND ground current 75 - mA Tstg storage temperature 65 +150 C Ptot total power dissipation Tamb = 40 C to +125 C [2] - 500 mW |
Ähnliche Teilenummer - 74AHC_AHCT573_15 |
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Ähnliche Beschreibung - 74AHC_AHCT573_15 |
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