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8V34S208 Datenblatt(PDF) 6 Page - Integrated Device Technology

Teilenummer 8V34S208
Bauteilbeschribung  Eight differential LVDS output pairs
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Hersteller  IDT [Integrated Device Technology]
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8V34S208 Datenblatt(HTML) 6 Page - Integrated Device Technology

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1:8 LVDS FANOUT BUFFER WITH 2-INPUT MULTIPLEXER
FOR 1PPS APPLICATIONS
6
REVISION A 06/26/14
8V34S208 DATA SHEET
AC Electrical Characteristics
Table 4G. LVDS Differential DC Characteristics, VDD = 2.5V ± 5%, TA = -40°C to 85°C
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum
Units
VOD
Differential Output Voltage
247
373
454
mV
V
OD
VOD Magnitude Change
50
mV
VOS
Offset Voltage
1.05
1.2
1.375
V
V
OS
VOS Magnitude Change
50
mV
Table 5. AC Characteristics, VDD =VDDO_A =VDDO_B = 3.3V ±5% or 2.5V ±5%, TA = -40°C to 85°C
1
Symbol
Parameter
Test Conditions
Minimum
Typical
Maximum
Units
fOUT
Output Frequency
250
MHz
V/t
Input Edge Rate2
CLKA, CLKB
MODE = 0
1
V/ns
tPD
Propagation Delay3
CLKA, CLKB to
Q[0-3], nQ[0-3]
200
325
434
ps
Propagation Delay4
CLKA, CLKB to
QA, QB
970
1.20
1.62
ns
tjit(Ø)
Buffer Additive
Phase Jitter, RMS;
Refer to Additive
Phase Jitter Section
Q[0-3], nQ[0-3]
fOUT = 156.25MHz,
Integration Range:
12kHz – 20MHz,
MODE 0
118
170
fs
tsk(pp)
Part-to-Part Skew56
Q[0-3], nQ[0-3]
250
ps
tsk(o)
Output Skew6
Q[0-3], nQ[0-3]7
65
ps
QA-QB8
65
ps
All outputs
1.3
ns
tsk(p)
Pulse Skew9, 10
Q[0-3], nQ[0-3]
11
62
ps
QA, QB
75
140
ps
tR /tF
Output Rise/
Fall Time
QA, QB;
20% to 80%
200
350
ps
Q[0-3], nQ[0-3]
20% to 80%
125
250
ps
MUXISOLATION MUX Isolation
11
fOUT = 100.00MHz,
VPP = 400mV
53
dB
NOTE 1: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when the device
is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. The device will meet specifications after thermal
equilibrium has been reached under these conditions.
NOTE 2: In MODE = 1 sinusoidal input signals are permitted and no minimum input edge rate specification applies.
NOTE 3: Measured from the differential input crosspoint to the differential output crosspoint using an input with 50% duty cycle.
NOTE 4: Measured from the differential input crosspoint to the output at VDDO_X/2 using an input with 50% duty cycle.
NOTE 5: Defined as skew between outputs on different devices operating at the same supply voltage, same frequency, same temperature and
with equal load conditions. Using the same type of inputs on each device, the outputs are measured at the differential crosspoints.
NOTE 6: This parameter is defined in accordance with JEDEC Standard 65.
NOTE 7: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at the differential crosspoints.
NOTE 8: Defined as skew between outputs at the same supply voltage and with equal load conditions. Measured at VDDO_X/2 of the output.
NOTE 9: Output pulse skew tSK(P) is the absolute difference of the propagation delay times: | tPLH –tPHL |.
NOTE 10: odc = input duty cycle ± (tSK(p)/2 * 1/Output Period) * 100
NOTE 11: Qx, nQx output measured differentially. See Parameter Measurement Information for MUX Isolation diagram.


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