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74LVC139 Datenblatt(PDF) 3 Page - NXP Semiconductors |
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74LVC139 Datenblatt(HTML) 3 Page - NXP Semiconductors |
3 / 16 page 74LVC139 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 5 — 19 October 2011 3 of 16 NXP Semiconductors 74LVC139 Dual 2-to-4 line decoder/demultiplexer 5. Pinning information 5.1 Pinning 5.2 Pin description Fig 3. Functional diagram mna780 1Y0 1Y1 1Y2 1Y3 7 6 5 4 1A0 1A1 1E 1 3 2 2Y0 2Y1 2Y2 2Y3 9 10 11 12 2A0 2A1 2E 15 13 14 DECODER DECODER (1) The die substrate is attached to this pad using conductive die attach material. It can not be used as a supply pin or input. Fig 4. Pin configuration SO16 and (T)SSOP16 Fig 5. Pin configuration DHVQFN14 139 1E VCC 1A0 2E 1A1 2A0 1Y0 2A1 1Y1 2Y0 1Y2 2Y1 1Y3 2Y2 GND 2Y3 001aad029 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 001aad031 139 1Y3 2Y2 GND(1) 1Y2 2Y1 1Y1 2Y0 1Y0 2A1 1A1 2A0 1A0 2E Transparent top view 7 10 6 11 5 12 4 13 3 14 2 15 terminal 1 index area Table 2. Pin description Name Pin Description 1E 1 enable input (active LOW) 2E 15 enable input (active LOW) 1A[0:1] 2, 3 address input 2A[0:1] 14, 13 address input 1Y[0:3] 4, 5, 6, 7 output |
Ähnliche Teilenummer - 74LVC139_15 |
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Ähnliche Beschreibung - 74LVC139_15 |
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