 |
Datenblatt-Suchmaschine für elektronische Bauteile |
|
|
Datenblatt-Suchmaschine für elektronische Bauteile |
|
8T49N4811 Datenblatt(PDF) 3 Page - Integrated Device Technology |
|
||||||||||||||||||||||||||||||
8T49N4811 Datenblatt(HTML) 3 Page - Integrated Device Technology |
|
|
3 / 34 page  REVISION A 3/30/15 3 I2C PROGRAMMABLE ETHERNET CLOCK GENERATOR 8T49N4811 DATA SHEET Pin Description and Pin Characteristic Tables Table 1. Pin Description Number Name Type Description 1 DIVSEL_C Input Pullup/Pulldown Output divider selection for Bank C. LVCMOS interface levels. 2VDD Power Core supply. 3 IN_SEL Input Pullup/Pulldown Input select between XTAL or differential input. LVCMOS interface levels. 4 DIN Input Differential Reference Input. Accepts DC-coupled LVDS and is internally biased to accept AC-coupled LVPECL, CML, HCSL or LVPECL signals. The differential inputs have an internal 100 resistor biased to V DD–1.3V approximately. 5 nDIN Input 6VDD_XTAL Power Crystal oscillator power supply. 7 XTAL_IN Input Crystal input. 8 XTAL_OUT Output Crystal output. 9 PLL_BYPASS Input Pulldown PLL Bypass. Provides copy of fIN to output banks A, B, C. LVCMOS interface levels. 10 IIC_ADRX_SEL Input Pulldown Selects between I2C addresses. LVCMOS interface levels. 11 VDDA Power Analog supply. 12 INPUT_DIVSEL Input Pullup/Pulldown Selects proper divide ratios for differential reference input. LVCMOS interface levels. 13 DIVSEL_D0 Input Pullup/Pulldown Output divider selection for Bank D0 differential output. LVCMOS interface levels. 14 LVCMOS_CTRL Input Pullup/Pulldown Divider and output enable control for Bank D1 LVCMOS output. LVCMOS interface levels. 15 SCLK Input Pullup I2C Clock Input. LVCMOS/LVTTL interface levels. 16 SDATA I/O Pullup I2C Data Input/Output. Input: LVCMOS/LVTTL interface levels. Output: Open Drain. 17 Reserved Pulldown Reserved. Internally connected to 50k pulldown. 18 DIVSEL_B Input Pullup/Pulldown Output divider selection for Bank B. LVCMOS interface levels. 19 nc This pin is not internally connected. Connect to ground to maintain second source compatibility. 20 QD0_S Output Bank D1 LVCMOS Output. 21 VDD_ODS Power Power supply for Bank D1 LVCMOS output. 22 QD_CTRL Input Pullup/Pulldown Control input for bank D0 output type and OE status. LVCMOS interface levels. 23 nQD0 Output Bank D0 Differential Output. LVDS or LVPECL output levels. 24 QD0 Output Bank D0 Differential Output. LVDS or LVPECL output levels. 25 VDD_OD Power Power supply for Bank D0 differential output. 26 QB_CTRL1 Input Pullup/Pulldown Control input for bank B outputs QB3 to QB5 output type and OE status. LVCMOS interface levels. 27 VDD Power Power supply. 28 SLEW_LVCMOS Input Pulldown Slew rate control pin for LVCMOS output. LVCMOS interface levels. 29 nQB5 Output Bank B Differential Output. LVDS or LVPECL output levels. 30 QB5 Output Bank B Differential Output. LVDS or LVPECL output levels. 31 nQB4 Output Bank B Differential Output. LVDS or LVPECL output levels. 32 QB4 Output Bank B Differential Output. LVDS or LVPECL output levels. 33 VDD_OB Power Power supply for Bank B. 34 nQB3 Output Bank B Differential Output. LVDS or LVPECL output levels. |
Ähnliche Teilenummer - 8T49N4811 |
|
Ähnliche Beschreibung - 8T49N4811 |
|
|
Link URL |
| Privatsphäre und Datenschutz |
| ALLDATASHEETDE.COM |
| War ALLDATASHEET hilfreich? [ DONATE ] |
Über Alldatasheet | Werbung | Kontakt | Privatsphäre und Datenschutz | Linktausch | Hersteller All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
German ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
