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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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54FCT377LMQB Datenblatt(PDF) 1 Page - National Semiconductor (TI) |
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54FCT377LMQB Datenblatt(HTML) 1 Page - National Semiconductor (TI) |
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1 / 8 page  54FCT377 Octal D-Type Flip-Flop with Clock Enable General Description The ’FCT377 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) input loads all flip-flops simultaneously, when the Clock Enable (CE) is LOW. The register is fully edge-triggered. The state of each D in- put, one setup time before the LOW-to-HIGH clock transi- tion, is transferred to the corresponding flip-flop’s Q output. The CE input must be stable only one setup time prior to the LOW-to-HIGH clock transition for predictable operation. Features n Clock enable for address and data synchronization applications n Eight edge-triggered D flip-flops n Buffered common clock n See ’FCT273 for master reset version n See ’FCT373 for transparent latch version n See ’FCT374 for TRI-STATE® version n TTL input and output level compatible n CMOS power consumption n Output sink capability of 32 mA, source capability of 12 mA n Standard Microcircuit Drawing (SMD) 5962-8762701 Ordering Code Military Package Package Description Number 54FCT377DMQB J20A 20-Lead Ceramic Dual-In-Line 54FCT377FMQB W20A 20-Lead Cerpack 54FCT377LMQB E20A 20-Lead Ceramic Leadless Chip Carrier, Type C Connection Diagram Pin Names Description D 0–D7 Data Inputs CE Clock Enable (Active LOW) CP Clock Pulse Input Q 0–Q7 Data Outputs TRI-STATE® is a registered trademark of National Semiconductor Corporation. Pin Assignment for DIP and Cerpack DS100952-1 Pin Assignment for LCC DS100952-11 October 1999 © 1999 National Semiconductor Corporation DS100952 www.national.com |
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