DAC101C081Q datasheet(8/40 Pages) TI1

Teilenummer	DAC101C081Q

Bauteilbeschribung	DAC101C08xx 10-Bit Micro Power Digital-to-Analog Converter With an I2C-Compatible Interface

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Hersteller	TI1 [Texas Instruments]

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DAC101C081, DAC101C081Q, DAC101C085

SNVS801B – APRIL 2012 – REVISED JANUARY 2016

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Product Folder Links: DAC101C081 DAC101C081Q DAC101C085

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Electrical Characteristics (continued)

The following specifications apply for VA = 2.7 V to 5.5 V, VREF = VA, CL = 200 pF to GND, input code range 12 to 1011. All

Maximum and Minimum limits apply for TMIN ≤ TA ≤ TMAX and all Typical limits are at TA = 25°C (unless otherwise specified).

PARAMETER

TEST CONDITIONS

MIN

TYP(1)

MAX(1)

UNIT

ICO_VA-1

VADAC101C081 supply current

fSCL = 400 kHz

VA = 2.7 V to

3.6 V

134

220

µA

VA = 4.5 V to

5.5 V

192

300

µA

fSCL = 3.4 MHz

VA = 2.7 V to

3.6 V

225

320

µA

VA = 4.5 V to

5.5 V

374

500

µA

ICO_VA-5

VADAC101C085 supply current

fSCL = 400 kHz

VA = 2.7 V to

3.6 V

101

155

µA

VA = 4.5 V to

5.5 V

142

220

µA

fSCL = 3.4 MHz

VA = 2.7 V to

3.6 V

193

235

µA

VA = 4.5 V to

5.5 V

325

410

µA

ICO_VREF

VREF supply current

(DAC101C085 only)

VA = 2.7 V to

3.6 V

33.5

55

µA

VA = 4.5 V to

5.5 V

49.5

71.4

µA

PCO

Power consumption

(VA & VREF for DAC101C085)

fSCL = 400 kHz

VA = 3 V

480

µW

VA = 5 V

1.06

mW

fSCL = 3.4 MHz

VA = 3 V

810

µW

VA = 5 V

2.06

mW

Power Down -- 2-wire interface quiet (SCL = SDA = VA) after PD mode written to DAC register. (output unloaded)

IPD

Supply current

(VA & VREF for DAC101C085)

All power-down

modes

VA = 2.7 V to

3.6 V

0.13

1.52

µA

VA = 4.5 V to

5.5 V

0.15

3.25

µA

PPD

Power consumption

(VA & VREF for DAC101C085)

All power-down

modes

VA = 3 V

0.5

µW

VA = 5 V

0.9

µW

(1)

Cb refers to the capacitance of one bus line. Cb is expressed in pF units.

(2)

Typical figures are at TJ = 25°C, and represent most likely parametric norms. Test limits are specified to AOQL (Average Outgoing

Quality Level).

(3)

Typical figures are at TJ = 25°C, and represent most likely parametric norms. Test limits are specified to AOQL (Average Outgoing

Quality Level).

(4)

This parameter is ensured by design and/or characterization and is not tested in production.

(5)

Applies to the Multiplying DAC configuration. In this configuration, the reference is used as the analog input. The value loaded in the

DAC Register will digitally attenuate the signal at Vout.

8.6 AC and Timing Characteristics

The following specifications apply for VA = 2.7 V to 5.5 V, VREF = VA, RL = Infinity, CL = 200 pF to GND. All Maximum and

Minimum limits apply for TMIN ≤ TA ≤ TMAX and all Typical limits are at TA = 25°C (unless otherwise specified).

PARAMETER

TEST CONDITIONS(1)

MIN

TYP(2)

MAX(1)(3)

UNIT

ts

Output voltage settling time(4)

100h to 300h code change

RL = 2 kΩ, CL = 200 pF

4.5

6

µs

SR

Output slew rate

1

V/µs

Glitch impulse

Code change from 200h to 1FFh

12

nV-sec

Digital feedthrough

0.5

nV-sec

Multiplying bandwidth(5)

VREF = 2.5 V ± 0.1 Vpp

160

kHz

Total harmonic distortion(5)

VREF = 2.5 V ± 0.1 Vpp

input frequency = 10 kHz

70

dB

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