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SM320F28335KGDS1 Datenblatt(PDF) 5 Page - Texas Instruments

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Teilenummer SM320F28335KGDS1
Bauteilbeschribung  Digital Signal Controller (DSC)
Download  182 Pages
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Hersteller  TI1 [Texas Instruments]
Direct Link  http://www.ti.com
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SM320F28335KGDS1 Datenblatt(HTML) 5 Page - Texas Instruments

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SM320F28335-HT
www.ti.com
SPRS682E – DECEMBER 2010 – REVISED JANUARY 2014
List of Figures
2-1
181-Pin GB
........................................................................................................................ 13
2-2
176-Pin PTP LQFP (Top View)
................................................................................................. 18
2-3
SM320F28335 Die Layout
...................................................................................................... 19
3-1
Functional Block Diagram
...................................................................................................... 42
3-2
Memory Map
...................................................................................................................... 44
3-3
External and PIE Interrupt Sources
............................................................................................ 57
3-4
External Interrupts
................................................................................................................ 57
3-5
Multiplexing of Interrupts Using the PIE Block
............................................................................... 58
3-6
Clock and Reset Domains
...................................................................................................... 61
3-7
OSC and PLL Block Diagram
................................................................................................... 62
3-8
Using a 3.3-V External Oscillator
............................................................................................... 63
3-9
Using a 1.9-V External Oscillator
............................................................................................... 63
3-10
Using the Internal Oscillator
.................................................................................................... 63
3-11
Watchdog Module
................................................................................................................ 65
4-1
DMA Functional Block Diagram
................................................................................................ 68
4-2
CPU-Timers
....................................................................................................................... 69
4-3
CPU-Timer Interrupt Signals and Output Signal
............................................................................. 69
4-4
Multiple PWM Modules
.......................................................................................................... 71
4-5
ePWM Submodules Showing Critical Internal Signal Interconnections
................................................... 74
4-6
eCAP Functional Block Diagram
............................................................................................... 77
4-7
eQEP Functional Block Diagram
............................................................................................... 78
4-8
Block Diagram of the ADC Module
............................................................................................ 81
4-9
ADC Pin Connections With Internal Reference
.............................................................................. 82
4-10
ADC Pin Connections With External Reference
............................................................................. 83
4-11
McBSP Module
.................................................................................................................. 86
4-12
eCAN Block Diagram and Interface Circuit
................................................................................... 89
4-13
eCAN-A Memory Map
........................................................................................................... 90
4-14
eCAN-B Memory Map
........................................................................................................... 91
4-15
Serial Communications Interface (SCI) Module Block Diagram
............................................................ 95
4-16
SPI Module Block Diagram (Slave Mode)
.................................................................................... 98
4-17
I2C Peripheral Module Interfaces
.............................................................................................. 99
4-18
GPIO MUX Block Diagram
.................................................................................................... 101
4-19
Qualification Using Sampling Window
....................................................................................... 106
4-20
External Interface Block Diagram
............................................................................................. 107
4-21
Typical 16-bit Data Bus XINTF Connections
................................................................................ 108
4-22
Typical 32-bit Data Bus XINTF Connections
................................................................................ 108
6-1
SM320F28335-HT Operating Life Derating Chart (GB)
................................................................... 111
6-2
SM320F28335-HT Wirebond Life Derating Chart (PTP)
.................................................................. 111
6-3
Typical Operational Current Versus Frequency for TA = 25°C ........................................................... 117
6-4
Typical Operational Current Versus Frequency for TA = 150°C ..........................................................
118
6-5
Typical Operational Current Versus Frequency for TA = 210°C ..........................................................
118
6-6
Emulator Connection Without Signal Buffering for the DSP
.............................................................. 119
6-7
3.3-V Test Load Circuit
......................................................................................................... 120
6-8
Clock Timing
..................................................................................................................... 123
6-9
Power-on Reset
................................................................................................................. 124
6-10
Warm Reset
..................................................................................................................... 125
6-11
Example of Effect of Writing Into PLLCR Register
......................................................................... 126
Copyright © 2010–2014, Texas Instruments Incorporated
List of Figures
5


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