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93AA46AE48 Datenblatt(PDF) 10 Page - Microchip Technology |
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93AA46AE48 Datenblatt(HTML) 10 Page - Microchip Technology |
10 / 26 page 93AA46AE48 DS20005229C-page 10 2013-2016 Microchip Technology Inc. 2.9 Write All (WRAL) The Write All (WRAL) instruction will write the entire memory array with the data specified in the command. For 93AA46AE48, after the last data bit is clocked into DI, the falling edge of CS initiates the self-timed auto-erase and programming cycle. Clocking of the CLK pin is not necessary after the device has entered the WRAL cycle. The WRAL command does include an automatic ERAL cycle for the device. Therefore, the WRAL instruction does not require an ERAL instruction, but the chip must be in the EWEN status. The DO pin indicates the Ready/Busy status of the device if CS is brought high after a minimum of 250 ns low (TCSL). VCC must be 4.5V for proper operation of WRAL. FIGURE 2-7: WRAL TIMING Note: After the Write All cycle is complete, issuing a Start bit and then taking CS low will clear the Ready/Busy status from DO. CS CLK DI DO HIGH-Z 100 01 x ••• x Dx ••• D0 High-Z Busy Ready TWL TCSL TSV TCZ Note: VCC must be ≥4.5V for proper operation of WRAL. |
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