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YSS902 Datenblatt(PDF) 8 Page - YAMAHA CORPORATION |
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YSS902 Datenblatt(HTML) 8 Page - YAMAHA CORPORATION |
8 / 12 page YSS902 8 CONTROL REGISTER The decoding system is controlled by reading and writing the control registers through microprocessor interface. (/CS, SCK, SI and SO) Note : All bits are set to “0” by initial clear (/IC=0) except for PLL0(bit 4) of PLL/DSN register (0x00). address Name bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0x00 PLL/DSN Register PLLUSE PLL2-0 DSNIGN DSN2 - 0 0x01 Mute Register LMUTEN CMUTEN RMUTEN RSMUTEN LSMUTEN LFEMUTEN DSPMUTEN AMOFF 0x02 SDIA Register SDIASEL PDOWN SDIAFMT1 - 0 SDIABIT1 - 0 SDIAWP SDIABP 0x03 SDOA Register SDOACKSEL SDOAFMT1 - 0 SDOABIT1 - 0 SDOAWP SDOABP 0x04 OPORT Register OPORT7 - 0 0x05 IPORT Register IPORT7 - 0 (Read only) 0x09 Noise Level Register NOISELEV7 - 0 0x0A Center Delay Register CDELAY2 - 0 0x0B Surround Delay Register SRDELAY3 - 0 0x0C Noise Register NOISE PN/WN 0x0D FS Register FS1 - 0 0x0E L Volume Register LVOL7 - 0 0x0F C Volume Register CVOL7 - 0 0x10 R Volume Register RVOL7 - 0 0x11 LS Volume Register LSVOL7 - 0 0x12 RS Volume Register RSVOL7 - 0 0x13 LFE Volume Register LFEVOL7 - 0 0x14 Compression Register EMPON AIBON VOLON DITHOFF P11OFF DIALOFF COMPMOD1 - 0 0x15 HDYNRNG Register HDYNRNG7 - 0 0x16 LDYNRNG Register LDYNRNG7 - 0 0x17 Mode Register AC3/PCM PLDECON PLSRMOD DUALMOD1 - 0 OUTMOD2 - 0 0x30 COEF0-H Register COEF0-15 - 8 0x31 COEF0-L Register COEF0-7 - 0 0x32 COEF1-H Register COEF1-15 - 8 0x33 COEF1-L Register COEF1-7 - 0 0x34 SDIB Register SDIBCKSEL SDIBSEL SDIBFMT1 - 0 SDIBBIT1 - 0 SDIBWP SDIBBP 0x35 SDOB Register SDOBCKSEL SDBUSE SDOBFMT1 - 0 SDOBBIT1 - 0 SDOBWP SDOBBP 0x36 ERAM Register ERAMUSE Note : Do not write "1" into the cross-hatched bits because they are used for testing the LSI. The following registers of address 0x18 to 0x2F are read-only (write disabled). address Name bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0 0x18 Bitstream Register 0 fscod frmsizecod 0x19 Bitstream Register 1 bsid bsmod 0x1A Bitstream Register 2 acmod cmixlev surmixlev lfeon 0x1B Bitstream Register 3 dsurmod copyrightb origbs 0 0 0 0 0x1C Bitstream Register 4 0 0 0 dialnorm 0x1D Bitstream Register 5 0 0 0 dialnorm2 0x1E Bitstream Register 6 audprodie mixlevel roomtyp 0x1F Bitstream Register 7 audprodi2e mixlevel2 roomtyp2 0x20 Bitstream Register 8 timecod1e 0 timecod1 0x21 Bitstream Register 9 timecod1 0x22 Bitstream Register 10 timecod2e 0 timecod2 0x23 Bitstream Register 11 timecod2 0x24 Bitstream Register 12 langcode langcod2e compre compr2e 0 0 0 0 0x25 Bitstream Register 13 langcod |
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Ähnliche Beschreibung - YSS902 |
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