Datenblatt-Suchmaschine für elektronische Bauteile |
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GS1660A Datenblatt(PDF) 10 Page - Semtech Corporation |
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GS1660A Datenblatt(HTML) 10 Page - Semtech Corporation |
10 / 83 page GS1660A HD/SD SDI Receiver Complete with SMPTE Video Processing Data Sheet 54386 - 3 September 2012 10 of 83 E2 SDI_GND Input Power GND pin for SDI buffer. Connect to analog GND. E7 SDOUT_TDO Output COMMUNICATION SIGNAL OUTPUT Please refer to the Output Logic parameters in the DC Electrical Characteristics table for logic level threshold and compatibility. GSPI serial data output/test data out. In JTAG mode (JTAG/HOST = HIGH), this pin is used to shift test results from the device. In host interface mode, this pin is used to read status and configuration data from the device. Note: GSPI is slightly different than the SPI. For more details on GSPI, please refer to 4.18 GSPI - HOST Interface. E8 SDIN_TDI Input COMMUNICATION SIGNAL INPUT Please refer to the Input Logic parameters in the DC Electrical Characteristics table for logic level threshold and compatibility. GSPI serial data in/test data in. In JTAG mode (JTAG/HOST = HIGH), this pin is used to shift test data into the device. In host interface mode, this pin is used to write address and configuration data words into the device. F1 TERM Analog Input Decoupling for internal SDI termination resistors. F7 CS_TMS Input COMMUNICATION SIGNAL INPUT Please refer to the Input Logic parameters in the DC Electrical Characteristics table for logic level threshold and compatibility. Chip select / test mode start. In JTAG mode (JTAG/HOST = HIGH), this pin is Test Mode Start, used to control the operation of the JTAG test. In host interface mode (JTAG/HOST = LOW), this pin operates as the host interface chip select and is active LOW. F8 SCLK_TCK Input COMMUNICATION SIGNAL INPUT Please refer to the Input Logic parameters in the DC Electrical Characteristics table for logic level threshold and compatibility. Serial data clock signal. In JTAG mode (JTAG/HOST = HIGH), this pin is the JTAG clock. In host interface mode (JTAG/HOST = LOW), this pin is the host interface serial bit clock. All JTAG/host interface addresses and data are shifted into/out of the device synchronously with this clock. Table 1-1:Pin Descriptions (Continued) Pin Number Name Timing Type Description |
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Ähnliche Beschreibung - GS1660A |
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