©2004 Fairchild Semiconductor Corporation

FDD8896 / FDU8896 Rev. C

Figure 5. Forward Bias Safe Operating Area

NOTE: Refer to Fairchild Application Notes AN7514 and AN7515

Figure 6. Unclamped Inductive Switching

Capability

Figure 7. Transfer Characteristics

Figure 8. Saturation Characteristics

Figure 9. Drain to Source On Resistance vs Gate

Voltage and Drain Current

Figure 10. Normalized Drain to Source On

Resistance vs Junction Temperature

0.1

1

10

100

1000

1

10

60

SINGLE PULSE

AREA MAY BE

OPERATION IN THIS

10

µs

1ms

DC

100

µs

10ms

1

10

100

0.01

0.1

1

10

100

500

If R = 0

If R

≠ 0

0

20

40

60

80

100

1.5

2.0

2.5

3.0

3.5

PULSE DURATION = 80

µs

DUTY CYCLE = 0.5% MAX

0

20

40

60

80

100

0

0.2

0.4

0.6

0.8

PULSE DURATION = 80

µs

DUTY CYCLE = 0.5% MAX

4

6

8

10

12

14

2

4

6

8

10

PULSE DURATION = 80

µs

DUTY CYCLE = 0.5% MAX

0.6

0.8

1.0

1.2

1.4

1.6

-80

-40

0

40

80

120

160

200

PULSE DURATION = 80

µs

DUTY CYCLE = 0.5% MAX