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MC10E111FNG Datenblatt(PDF) 5 Page - ON Semiconductor |
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MC10E111FNG Datenblatt(HTML) 5 Page - ON Semiconductor |
5 / 9 page MC10E111, MC100E111 www.onsemi.com 5 Table 6. 100E SERIES NECL DC CHARACTERISTICS (VCCx = 0.0 V; VEE = −5.0 V (Note 1)) Symbol Characteristic −40°C 25°C 85°C Unit Min Typ Max Min Typ Max Min Typ Max IEE Power Supply Current 40 60 45 60 50 69 mA VOH Output HIGH Voltage (Note 2) −1025 −980 −880 −1025 −980 −880 −1025 −980 −880 mV VOL Output LOW Voltage (Note 2) −1810 −1700 −1620 −1810 −1700 −1620 −1810 −1700 −1620 mV VIH Input HIGH Voltage (Single-Ended) −1165 −1025 −880 −1165 −1025 −880 −1165 −1025 −880 mV VIL Input LOW Voltage (Single-Ended) −1810 −1645 −1475 −1810 −1645 −1475 −1810 −1645 −1475 mV VBB Output Voltage Reference −1.38 −1.25 −1.38 −1.26 −1.38 −1.26 V VIHCMR Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 3) −1.6 −0.4 −1.6 −0.4 −1.6 −0.4 V IIH Input HIGH Current 150 150 150 mA IIL Input LOW Current 0.5 0.5 0.25 0.5 0.2 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. Input and output parameters vary 1:1 with VCC. VEE can vary −0.46 V / +0.8 V. 2. Outputs are terminated through a 50 W resistor to VCC − 2.0 V 3. VIHCMR min and max vary 1:1 with VCC. Table 7. AC CHARACTERISTICS (VCCx = 5.0 V; VEE= 0.0 V or VCCx = 0.0 V; VEE= −5.0 V (Note 1)) Symbol Characteristic −40°C 25°C 85°C Unit Min Typ Max Min Typ Max Min Typ Max fMAX Maximum Toggle Frequency 800 800 800 MHz tPLH tPHL Propagation Delay to Output IN (Diff) (Note 2) IN (SE) (Note 3) Enable (Note 4) Disable (Note 4) 430 380 400 400 630 680 900 900 430 380 450 450 630 680 850 850 430 380 450 450 630 680 850 850 ps ts Setup Time (Note 5) EN to IN 250 0 200 0 200 0 ps tH Hold Time (Note 6) IN to EN 50 −200 0 −200 0 −200 ps tR Release Time (Note 7) EN to IN 350 100 300 100 300 100 ps NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. 10 Series: VEE can vary −0.46 V / +0.06 V. 100 Series: VEE can vary −0.46 / +0.8 V. 2. The differential propagation delay is defined as the delay from the crossing points of the differential input signals to the crossing point of the differential output signals. 3. The single-ended propagation delay is defined as the delay from the 50% point of the input signal to the 50% point of the output signal. 4. Enable is defined as the propagation delay from the 50% point of a negative transition on EN to the 50% point of a positive transition on Q (or a negative transition on Q). Disable is defined as the propagation delay from the 50% point of a positive transition on EN to the 50% point of a negative transition on Q (or a positive transition on Q). 5. The setup time is the minimum time that EN must be asserted prior to the next transition of IN/IN to prevent an output response greater than $75 mV to that IN/IN transition (Figure 3). 6. The hold time is the minimum time that EN must remain asserted after a negative going IN or a positive going IN to prevent an output response greater than $75 mV to that IN/IN transition (Figure 4). 7. The release time is the minimum time that EN must be deasserted prior to the next IN/IN transition to ensure an output response that meets the specified IN to Q propagation delay and output transition times (Figure 5). 8. The within-device skew is defined as the worst case difference between any two similar delay paths within a single device. |
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