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M74VHCT157ADTR2G Datenblatt(PDF) 1 Page - ON Semiconductor

Teilenummer M74VHCT157ADTR2G
Bauteilbeschribung  Quad 2-Channel Multiplexer
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Hersteller  ONSEMI [ON Semiconductor]
Direct Link  http://www.onsemi.com
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© Semiconductor Components Industries, LLC, 2014
October, 2014 − Rev. 4
1
Publication Order Number:
MC74VHCT157A/D
MC74VHCT157A
Quad 2-Channel Multiplexer
The MC74VHCT157A is an advanced high speed CMOS quad
2−channel multiplexer fabricated with silicon gate CMOS technology.
It achieves high speed operation similar to equivalent Bipolar
Schottky TTL while maintaining CMOS low power dissipation.
It consists of four 2−input digital multiplexers with common select
(S) and enable (E) inputs. When E is held High, selection of data is
inhibited and all the outputs go Low.
The select decoding determines whether the A or B inputs get routed
to the corresponding Y outputs.
The VHCT inputs are compatible with TTL levels. This device can
be used as a level converter for interfacing 3.3 V to 5.0 V because it
has full 5.0 V CMOS level output swings.
The VHCT157A input structures provide protection when voltages
between 0 V and 5.5 V are applied, regardless of the supply voltage.
The output structures also provide protection when VCC = 0 V. These
input and output structures help prevent device destruction caused by
supply voltage−input/output voltage mismatch, battery backup, hot
insertion, etc.
The inputs tolerate voltages up to 7.0 V, allowing the interface of
5.0 V systems to 3.0 V systems.
Features
High Speed: tPD = 4.1 ns (Typ) at VCC = 5.0 V
Low Power Dissipation: ICC = 4 mA (Max) at TA = 25°C
TTL−Compatible Inputs: VIL = 0.8 V; VIH = 2.0 V
Power Down Protection Provided on Inputs and Outputs
Balanced Propagation Delays
Designed for 2.0 V to 5.5 V Operating Range
Low Noise: VOLP = 0.8 V (Max)
Pin and Function Compatible with Other Standard Logic Families
Latchup Performance Exceeds 300 mA
ESD Performance:
Human Body Model > 2000 V;
Machine Model > 200 V
Chip Complexity: 82 FETs or 20 Equivalent Gates
These Devices are Pb−Free and are RoHS Compliant
MARKING
DIAGRAMS
TSSOP−16
DT SUFFIX
CASE 948F
SOIC−16
D SUFFIX
CASE 751B
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
ORDERING INFORMATION
http://onsemi.com
A
= Assembly Location
WL, L
= Wafer Lot
Y
= Year
WW, W
= Work Week
G or
G
= Pb−Free Package
VHCT157AG
AWLYWW
VHCT
157A
ALYW
G
G
(Note: Microdot may be in either location)
1
1
16
1
1
16
FUNCTION TABLE
E
S
Y0 − Y3
A0 − A3, B0 − B3 = the levels of
the respective Data−Word Inputs.
H
L
L
X
L
H
L
A0 − A3
B0 − B3
Inputs
Outputs


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