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MC33984PNA Datenblatt(PDF) 3 Page - Motorola, Inc

Teilenummer MC33984PNA
Bauteilbeschribung  Dual Intelligent High-Current Self-Protected Silicon High-Side Switch (4.0 m??
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Hersteller  MOTOROLA [Motorola, Inc]
Direct Link  http://www.freescale.com
Logo MOTOROLA - Motorola, Inc

MC33984PNA Datenblatt(HTML) 3 Page - Motorola, Inc

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MOTOROLA ANALOG INTEGRATED CIRCUIT DEVICE DATA
33984
3
CSNS
IN0
FS
FSI
CS
SCLK
RST
WAKE
SI
VDD
SO
IN1
1
11
10
9
8
7
6
5
4
3
2
HS0
HS1
16
15
VPWR
Transparent Top View of Package
14
GND
13
12
TERMINAL DEFINITIONS
Functional descriptions of many of these terminals can be found in the System/Application Information section beginning on
page 15.
Terminal
Terminal
Name
Formal Name
Definition
1
CSNS
Output Current Monitoring
This terminal is used to output a current proportional to the designated HS0-1 output.
That current is fed into a ground-referenced resistor and its voltage is monitored by an
MCU's A/D. The channel to be monitored is selected via the SPI. This terminal can be
tri-stated through SPI.
2
WAKE
Wake
This terminal is used to input a logic [1] signal so as to enable the watchdog timer
function. An internal clamp protects this terminal from high damaging voltages when the
output is current limited with an external resistor. This input has a passive internal
pulldown.
3
RST
Reset (Active Low)
This input terminal is used to initialize the device configuration and fault registers, as
well as place the device in a low current sleep mode. The terminal also starts the
watchdog timer when transitioning from logic LOW to logic HIGH. This terminal should
not be allowed to be logic HIGH until VDD is in regulation. This terminal has a passive
internal pulldown.
4
IN0
Serial Input
This input terminal is used to directly control the output HS0. This input has an active
internal pulldown current source and requires CMOS logic levels. This input may be
configured via SPI.
5
FS
Fault Status (Active Low)
This is an open drain configured output requiring an external pullup resistor to VDD for
fault reporting. When a device fault condition is detected, this terminal is active LOW.
Specific device diagnostic faults are reported via the SPI SO terminal.
6
FSI
Fail-Safe Input
The value of the resistance connected between this terminal and ground determines
the state of the outputs after a watchdog timeout occurs. Depending on the resistance
value, either all outputs are OFF, ON, or the output HSO only is ON. When the FSI
terminal is connected to GND, the watchdog circuit and fail-safe operation are disabled.
This terminal incorporates an active internal pullup current source.
7
CS
Chip Select (Active Low)
This input terminal is connected to a chip select output of a master microcontroller
(MCU). The MCU determines which device is addressed (selected) to receive data by
pulling the CS terminal of the selected device logic LOW, enabling SPI communication
with the device. Other unselected devices on the serial link having their CS terminals
pulled-up logic HIGH disregard the SPI communication data sent. This terminal
incorporates an active internal pullup current source.
8
SCLK
Serial Clock
This input terminal is connected to the MCU providing the required bit shift clock for SPI
communication. It transitions one time per bit transferred at an operating frequency,
fSPI, defined by the communication interface. The 50 percent duty cycle CMOS-level
serial clock signal is idle between command transfers. The signal is used to shift data
into and out of the device. This input has an active internal pulldown current source.
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com


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