Datenblatt-Suchmaschine für elektronische Bauteile |
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AK5554VN Datenblatt(PDF) 34 Page - Asahi Kasei Microsystems |
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AK5554VN Datenblatt(HTML) 34 Page - Asahi Kasei Microsystems |
34 / 68 page [AK5554] 015099864-E-00 2016/03 - 34 - [2] DSD Mode The AK5554 only supports master mode in DSD mode. The external clock, which is required to operate the AK5554, is MCLK in DSD mode. The AK5554 generates DCLK from MCLK inputs and DSD data outputs (DSDOL1-2 and DSDOR1-2) are synchronized with DCLK. The necessary MCLK frequencies are 512fs and 768fs (fs=32 kHz, 44.1 kHz, 48 kHz). MCLK frequency can be changed by the DCKS pin (bit). After exiting res et (PDN pin = “L” → “H”) upon power-up, the AK5554 is in power-down state until MCLK is input. DCKS pin (bit) MCLK Frequency (default) L(0) 512fs H(1) 768fs Table 6. System Clock (DSD mode) The AK5554 supports 64fs, 128fs and 256fs DSD sampling frequencies (fs= 32 kHz 44.1 kHz, 48 kHz). DSDSEL1-0 pins (bits) control this setting (Table 7). DSDSEL1 pin (bit) DSDSEL0 pin (bit) Frequency Mode DSD Sampling Frequency fs= 32 kHz fs= 44.1 kHz fs= 48 kHz L(0) L(0) 64fs 2.048 MHz 2.8224 MHz 3.072 MHz (default) L(0) H(1) 128fs 4.096 MHz 5.6448 MHz 6.144 MHz H(1) L(0) 256fs 8.192 MHz 11.2896 MHz 12.288 MHz H(1) H(1) - Reserved Reserved Reserved Table 7. DSD Sampling Frequency Select ■ Audio Interface Format TDM1-0 pins(bits), DIF1-0 pins(bits), SLOW pin(bit) and SD pin(bit) settings should be changed when all channel are reset condition. [1] PCM Mode 48 types of audio interface format can be selected by the TDM1-0 pins (bits), MSN pin and DIF1-0 pins (bits) (Table 8, Table 9). In all formats the serial data is MSB-first, 2's complement format. In master mode, the SDTO1-2 is clocked out on the falling edge of BICK. Normal output in slave mode, the SDTO1-2 is clocked out on the falling edge of BICK if 8 kHz ≤ fs ≤ 216 kHz. In other conditions, the data is clocked out on the prior rising edge of BICK to compensate for some delay that renders the edge of data transition near BICK falling edge. Audio interface format is distinguished in four types: Normal mode, TDM128 mode, TDM256 mode and TDM512 mode are available. The TDM1-0 pins (bits) select these modes. In Normal mode (non TDM), AIN1 and AIN2 A/D converted data is output from the SDTO1 pin, AIN3 and AIN4 A/D converted data is output from the SDTO2 pin. The BICK frequency must be in the rage from 48fs to 128fs (fs= 48 kHz) in slave mode if the audio interface format is in normal output (non TDM) and the interface speed is in Normal, Double or Quad mode. Bit length of A/D data is 24-bit or 32-bit and it is selected by the DIF1 pin (bit). The BICK frequency must be set to 32fs, 48fs or 64fs in slave mode if the audio interface format is normal output (non TDM) and the interface speed is in OCT mode. Bit length of A/D data is determined by BICK frequency regardless of the DIF1 pin (bit) if the BICK frequency is 32fs or 48fs. It is 16-bit when the BICK frequency is 32fs and 24-bit when the BICK frequency is 48fs. When the BICK frequency is 64fs, A/D data can be selected between 24-bit and 32-bit by the DIF1 pin (bit). |
Ähnliche Teilenummer - AK5554VN_16 |
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Ähnliche Beschreibung - AK5554VN_16 |
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