Datenblatt-Suchmaschine für elektronische Bauteile |
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AK5554VN Datenblatt(PDF) 6 Page - Asahi Kasei Microsystems |
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AK5554VN Datenblatt(HTML) 6 Page - Asahi Kasei Microsystems |
6 / 68 page [AK5554] 015099864-E-00 2016/03 - 6 - No. Pin Name I/O Function Power Down Status 31 CKS0 I Clock Mode Select Pin - SDA I/O Control Data I/O Pin in I 2C Bus Serial Control Mode Hi-z CDTI I Control Data Input Pin in 3-wire Serial Control Mode - 32 CKS1 I Clock Mode Select Pin - CAD0_I2C I Chip Address 0 Pin in I 2C Bus Serial Control Mode - CSN I Chip Select Pin in 3-wire Serial Control Mode - 33 CKS2 I Clock Mode Select Pin - SCL I Control Data Clock Pin in I 2C Bus Serial Control Mode - CCLK I Control Data Clock Pin in 3-wire Serial Control Mode - 34 CKS3 I Clock Mode Select Pin - CAD1 I Chip Address 1 Pin in I 2C Bus or 3-wire Serial Control Mode - 35 SLOW I Slow Roll-OFF Digital Filter Select Pin in PCM Mode - DCKB I Polarity of DCLK Pin in DSD Mode - 36 SD I Short Delay Digital Filer Select Pin in PCM Mode - PMOD I DSD Phase Modulation Mode Select Pin in DSD Mode - 37 DIF0 I Audio Data Format Select Pin in PCM Mode “L”: MSB Justified, “H”: I 2S - DSDSEL0 I DSD Sampling Rate Control Pin in DSD Mode - 38 DIF1 I Audio Data Format Select Pin in PCM Mode “L”: 24-bit Mode, “H”: 32-bit Mode - DSDSEL1 I DSD Sampling Rate Control Pin in DSD Mode - 39 TDM0 I TDM I/F Format Select Pin * This pin must be fixed to “L” when using DSD mode. - 40 TDM1 I TDM I/F Format Select Pin * This pin must be fixed to “L” when using DSD mode. - 41 PSN I Control Mode Select Pin (I2C pin = “H”) “L”:I 2C Bus Serial Control Mode, “H” :Parallel Control Mode - CAD0_SPI I Chip Address 0 Pin in 3-wire serial control Mode (I2C pin = “L”) - 42 I2C I Control Mode Select Pin “L”: 3-wire Serial Control Mode “H”: I 2C Bus Serial Control Mode or Parallel Control Mode - 43 DP I DSD Mode Enable Pin “L”: PCM Mode, “H”: DSD Mode - 44 HPFE I High Pass Filter Enable Pin “L”: HPF Disable, “H”: HPF Enable - DCKS I Master Clock Frequency Select at DSD Mode (DSD Only) - 45 LDOE I LDO Enable Pin “L”: LDO Disable, “H”: LDO Enable This pin is pulled down by 100 k Ω internally. - 46 ODP I Optimal Data Placement Mode Enable Pin - 47 AIN1P I Channel 1 Positive Input Pin - 48 AIN1N I Channel 1 Negative Input Pin - Note 1. All digital input pins must not be allowed to float. |
Ähnliche Teilenummer - AK5554VN_16 |
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Ähnliche Beschreibung - AK5554VN_16 |
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