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AK5554VN Datenblatt(PDF) 8 Page - Asahi Kasei Microsystems

Teilenummer AK5554VN
Bauteilbeschribung  4-Channel Differential 32-bit ADC
Download  68 Pages
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Hersteller  AKM [Asahi Kasei Microsystems]
Direct Link  http://www.akm.com
Logo AKM - Asahi Kasei Microsystems

AK5554VN Datenblatt(HTML) 8 Page - Asahi Kasei Microsystems

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[AK5554]
015099864-E-00
2016/03
- 8 -
6. Absolute Maximum Ratings
(VSS= 0 V; Note 3)
Parameter
Symbol
Min.
Max.
Unit
Power
Supplies:
Analog (AVDD pin)
Digital Interface (TVDD pin)
Digital Core (VDD18 pin)(Note 4)
AVDDam
TVDDam
VDD18am
−0.3
−0.3
−0.3
6.0
4.0
2.5
V
V
V
Input Current (Any Pin Except Supplies)
IIN
-
10
mA
Analog Input Voltage (AIN1-4P, AIN1-4N pins)
VINA
−0.3
AVDD+0.3
V
Digital Input Voltage
VIND
−0.3
TVDD+0.3
V
Ambient Temperature (Power applied)
When the back tab is connected to VSS
When the back tab is open
Ta
Ta
−40
−40
105
70
C
C
Storage Temperature
Tstg
−65
150
C
Note 3. All voltages with respect to ground.
Note 4. The 1.8 V LDO
is off (LDOE pin = “L”) and an external power is supplied to the VDD18 pin.
WARNING: Operation at or beyond these limits may result in permanent damage to the device.
Normal operation is not guaranteed at these extremes.
7. Recommended Operation Conditions
(VSS=0V; Note 3)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Power
Supplies
Analog (AVDD pin)
AVDD
4.5
5.0
5.5
V
(LDOE pin=
“L”) (Note 5)
Digital Interface (TVDD pin)
(Note 6)
Digital Core (VDD18 pin)
TVDD
VDD18
1.7
1.7
1.8
1.8
1.98
1.98
V
V
(LDOE pin=
“H”) (Note 7)
Digital Interface (TVDD pin)
TVDD
3.0
3.3
3.6
V
Voltage
Reference
(Note 11)
“H” voltage Reference (Note 8)
VREFH1-2
4.5
5.0
5.5
V
“L” voltage reference
VREFL1-2
-
AVSS
-
V
Note 3. All voltages with respect to ground.
Note 5. VDD18 must be powered up either at the same time or after TVDD is powered up when the LDOE
pin = “L”. The power up sequence between AVDD pin and TVDD pin or between AVDD pin and
VDD18 pin is not critical.
Note 6. TVDD must not exceed VDD18±0.1
V when LDOE pin= “L”.
Note 7. When LDOE p
in = “H”, the internal LDO supplies 1.8 V (typ). The power up sequences between
AVDD pin and TVDD pin is not critical.
Note 8. VREFH1-2 must not exceed AVDD+0.1 V.
Note 9. VREFL1-2 must be connected to AVSS.
Analog Input Voltage is proportional to {(VREFH)
– (VREFL)}.
Vin (typ, @ 0dB) =
2.8  {(VREFH) – (VREFL)} / 5 [V].
* AKM assumes no responsibility for the usage beyond the conditions in this data sheet.


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