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74AHCT257PW Datenblatt(PDF) 11 Page - NXP Semiconductors |
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74AHCT257PW Datenblatt(HTML) 11 Page - NXP Semiconductors |
11 / 20 page 2000 Apr 03 11 Philips Semiconductors Product specification Quad 2-input multiplexer; 3-state 74AHC257; 74AHCT257 handbook, full pagewidth MNA450 tPLZ tPHZ outputs disabled outputs enabled VOH − 0.3 V VOL + 0.3 V outputs enabled output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH OE input VI VCC VM (1) VOL VOH GND GND tPZL tPZH VM (2) VM (2) Fig.7 3-state enable and disable times. FAMILY VI INPUT REQUIREMENTS VM(1) INPUT VM(2) OUTPUT AHC GND to VCC 50% VCC 50% VCC AHCT GND to 3.0 V 1.5 V 50% VCC Fig.7 3-state enable and disable times. Fig.8 Load circuitry for switching times. handbook, full pagewidth open GND VCC VCC VI VO MNA219 D.U.T. CL RT 1000 Ω PULSE GENERATOR S1 TEST S1 tPLH/tPHL open tPLZ/tPZL VCC tPHZ/tPZH GND Definitions for test circuit. CL = load capacitance including jig and probe capacitance (See Chapter “AC characteristics”). RT = termination resistance should be equal to the output impedance Zo of the pulse generator. |
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