HT48R063B_13 datasheet(33/82 Pages) HOLTEK

Teilenummer	HT48R063B

Bauteilbeschribung	Enhanced I/O Type 8-Bit OTP MCU

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HT48R063B/064B/065B/066B

Rev. 1.20

33

June 3, 2013

· RES Pin Reset

This type of reset occurs when the microcontroller is

already running and the RES pin is forcefully pulled

low by external hardware such as an external switch.

In this case as in the case of other reset, the Program

Counter will reset to zero and program execution initi-

ated from this point.

· Low Voltage Reset

- LVR

The microcontroller contains a low voltage reset cir-

cuit in order to monitor the supply voltage of the de-

vice. The LVR function is selected via a configuration

option. If the supply voltage of the device drops to

within a range of 0.9V~VLVR such as might occur when

changing the battery, the LVR will automatically reset

the device internally. For a valid LVR signal, a low sup-

ply voltage, i.e., a voltage in the range between

0.9V~VLVR must exist for a time greater than that spec-

ified by tLVR in the A.C. characteristics. If the low sup-

ply voltage state does not exceed this value, the LVR

will ignore the low supply voltage and will not perform

a reset function. The actual VLVR value can be se-

lected via configuration options.

· Watchdog Time-out Reset during Normal Operation

The Watchdog time-out Reset during normal opera-

tion is the same as a hardware RES pin reset except

that the Watchdog time-out flag TO will be set to

²1².

· Watchdog Time-out Reset during Idle/Sleep mode

The Watchdog time-out Reset during Idle/Sleep mode

is a little different from other kinds of reset. Most of the

conditions remain unchanged except that the Pro-

gram Counter and the Stack Pointer will be cleared to

²0² and the TO flag will be set to ²1². Refer to the A.C.

Characteristics for tSST details.

Note:

The tSST 2 clock cycles via configuration option

if the system clock source is provided by ERC or

HIRC. The SST is 128 for HXT or LXT.

Reset Initial Conditions

The different types of reset described affect the reset

flags in different ways. These flags, known as PDF and

TO are located in the status register and are controlled

by various microcontroller operations, such as the

Idle/Sleep function or Watchdog Timer. The reset flags

are shown in the table:

TO

PDF

RESET Conditions

0

Power-on reset

uu

RES or LVR reset during Normal or Slow

Mode operation

1u

WDT time-out reset during Normal or

Slow Mode operation

11

WDT time-out reset during Idle or Sleep

Mode operation

Note:

²u² stands for unchanged

The following table indicates the way in which the vari-

ous components of the microcontroller are affected after

a power-on reset occurs.

Item

Condition After RESET

Program Counter

Reset to zero

Interrupts

All interrupts will be disabled

WDT

Clear after reset, WDT begins

counting

Timer/Event

Counter

Timer Counter will be turned off

Prescaler

The Timer Counter Prescaler will

be cleared

Input/Output Ports

I/O ports will be setup as inputs

Stack Pointer

Stack Pointer will point to the top

of the stack

t S S T

W D T T i m e - o u t

I n t e r n a l R e s e t

WDT Time-out Reset during Idle/Sleep

Timing Chart

R E S

I n t e r n a l R e s e t

0 . 9 V D D

0 . 4 V D D

t R S T D + t S S T

Note: tRSTD is power-on delay, typical time=50ms

RES Reset Timing Chart

L V R

I n t e r n a l R e s e t

t R S T D + t S S T

Note: tRSTD is power-on delay, typical time=50ms

Low Voltage Reset Timing Chart

t R S T D + t S S T

W D T T i m e - o u t

I n t e r n a l R e s e t

Note: tRSTD is power-on delay, typical time=50ms

WDT Time-out Reset during Normal Operation

Timing Chart

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