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HT86A36 Datenblatt(PDF) 44 Page - Holtek Semiconductor Inc

Teilenummer HT86A36
Bauteilbeschribung  A/D Type Voice 8-Bit MCU
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Hersteller  HOLTEK [Holtek Semiconductor Inc]
Direct Link  http://www.holtek.com
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HT86A36 Datenblatt(HTML) 44 Page - Holtek Semiconductor Inc

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HT86Axx/HT86ARxx
Rev. 1.10
44
December 12, 2012
In the following table, D0~D11 are the A/D conversion
data result bits.
Register
Bit
7
Bit
6
Bit
5
Bit
4
Bit
3
Bit
2
Bit
1
Bit
0
ADRL
D3
D2
D1
D0
¾¾¾¾
ADRH
D11 D10 D9
D8
D7
D6
D5
D4
A/D Data Register
A/D Converter Control Register
- ADCR
To control the function and operation of the A/D con-
verter, a control register known as ADCR is provided.
This 8-bit register defines functions such as the selec-
tion of which analog channel is connected to the internal
A/D converter, which pins are used as analog inputs and
which are used as normal I/Os as well as controlling the
start function and monitoring the A/D converter end of
conversion status.
One section of this register contains the bits
ACS1~ACS0 which define the channel number. As each
of the devices contains only one actual analog to digital
converter circuit, each of the individual 4 analog inputs
must be routed to the converter. It is the function of the
ACS1~ACS0 bits in the ADCR register to determine
which analog channel is actually connected to the inter-
nal A/D converter.
The ADCR control register also contains the
PCR2~PCR0 bits which determine which pins on Port C
are used as analog inputs for the A/D converter and
which pins are to be used as normal I/O pins. Note that if
the PCR2~PCR0 bits are all set to zero, then all the Port
C pins will be setup as normal I/Os and the internal A/D
converter circuitry will be powered off to reduce the
power consumption.
The START bit in the ADCR register is used to start and
reset the A/D converter. When the microcontroller sets
this bit from low to high and then low again, an analog to
digital conversion cycle will be initiated. When the
START bit is brought from low to high but not low again,
the EOC bit in the ADCR register will be set high and the
analog to digital converter will be reset. It is the START
bit that is used to control the overall on/off operation of
the internal analog to digital converter.
The EOC bit in the ADCR register is used to indicate
when the analog to digital conversion process is com-
plete. This bit will be automatically cleared to zero by the
microcontroller after a conversion cycle has ended. In
addition, the corresponding A/D interrupt request flag
will be set in the interrupt control register, and if the inter-
rupts are enabled, an appropriate internal interrupt sig-
nal will be generated. This A/D internal interrupt signal
will direct the program flow to the associated A/D inter-
nal interrupt address for processing. If the A/D internal
interrupt is disabled, the microcontroller can be used to
poll the EOC bit in the ADCR register to check whether it
has been cleared as an alternative method of detecting
the end of an A/D conversion cycle.
A/D Converter Clock Source Register
- ACSR
The clock source for the A/D converter, which originates
from the system clock fOSC, is first divided by a division
ratio, the value of which is determined by the ADCS1
and ADCS0 bits in the ACSR register.
Although the A/D clock source is determined by the sys-
tem clock fOSC, and by bits ADCS1 and ADCS0, there
are some limitations on the maximum A/D clock source
speed that can be selected. Refer to the following table.
ACS1
ACS0
Analog Channel
0
0
AN0
0
1
AN1
1
0
AN2
1
1
AN3
ACS Table: A/D Channel Select Table
A D C R R e g i s t e r
S e l e c t A / D c h a n n e l
T h e d e t a i l r e f e r e n c e A C S t a b l e
b 7
b 0
S T A R T
P C R 2 P C R 1 P C R 0
A C S 1 A C S 0
P o r t C A / D c h a n n e l c o n f i g u r a t i o n s
T h e d e t a i l r e f e r e n c e P C R t a b l e
E n d o f A / D c o n v e r s i o n f l a g
1 : n o t e n d o f A / D c o n v e r s i o n - A / D c o n v e r s i o n w a i t i n g o r i n p r o g r e s s
0 : e n d o f A / D c o n v e r s i o n - A / D c o n v e r s i o n e n d e d
S t a r t t h e A / D c o n v e r s i o n
0 ® 1 ® 0 : S t a r t
0 ® 1 : R e s e t A / D c o n v e r t e r a n d s e t E O C B t o " 1 "
E O C B
N o t i m p l e m e n t e d r e a d a s " 0 "
ADCR Register


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