BU2385KN

Multimedia ICs

2/4

Block diagram

Back View

AVDD

AVDD

AVSS

XIN

XOUT

CLK1_OUT

VDD1

VDD1

VSS1

CKL2ON

2

3

4

5

1

15

14

13

12

11

16

17

18

19

20

10

9

8

7

6

Explanation for terminal function

PIN No.

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

PIN NAME

AVDD

AVDD

AVSS

XIN

XOUT

TEST 1

Function

Analog VDD

Analog VDD

Analog GND

Standard crystal input

Standard crystal output

Input for test mode

(normally open)

with pull

−down

with pull up

with pull up

with pull up

with pull up

with pull up

XTAL_SEL

REF_CLK

Crystal select

H : 28.636363MHz

L : 14.318182MHz

FS3

FS2

FS1

CLK1OUT

CLK2OUT

CLK2ON

CLK1,2 output select

CLK1,2 output select

REFCLK output select

REF_CLK GND

REF_CLK VDD

71.877274M / 90.314686M /

96.016044M / 114.54546M clock output

96.016044M / 48.008022M clock output

14.318182M / 17.734450M clock output

GND for CLK 1, 2 clock output and Logic circuit

VDD for CLK 1, 2,clock output and Logic circuit

VDD for CLK 1, 2,clock output and Logic circuit

CLK2 output control

H : enable

L : disable

VSS 1

VSS 2

VDD 1

VDD 2

VDD 1

TEST2

Input for test mode

(normally open)

with pull

−down